PIC18LF252-ISP Datasheet, PDF (211/332 Pages) Microchip Technology – High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D

PIC18FXX2
FIGURE 19-5:
EXTERNAL BLOCK TABLE READ (EBTRn) DISALLOWED
Register Values
Program Memory
Configuration Bit Settings
TBLPTR = 000FFF
000000h
0001FFh
000200h
WRTB,EBTRB = 11
WRT0,EBTR0 = 10
PC = 002FFE
TBLRD *
001FFFh
002000h
003FFFh
004000h
005FFFh
006000h
007FFFh
WRT1,EBTR1 = 11
WRT2,EBTR2 = 11
WRT3,EBTR3 = 11
Results: All Table Reads from external blocks to Blockn are disabled whenever EBTRn = ‘0’.
TABLAT register returns a value of “0”.
FIGURE 19-6:
EXTERNAL BLOCK TABLE READ (EBTRn) ALLOWED
Register Values
Program Memory
000000h
0001FFh
000200h
Configuration Bit Settings
WRTB,EBTRB = 11
TBLPTR = 000FFF
WRT0,EBTR0 = 10
PC = 001FFE
TBLRD *
001FFFh
002000h
003FFFh
004000h
005FFFh
006000h
WRT1,EBTR1 = 11
WRT2,EBTR2 = 11
WRT3,EBTR3 = 11
007FFFh
Results: Table Reads permitted within Blockn, even when EBTRBn = ‘0’.
TABLAT register returns the value of the data at the location TBLPTR.
© 2006 Microchip Technology Inc.
DS39564C-page 209