PIC18LF252-ISP Datasheet, PDF (276/332 Pages) Microchip Technology – High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D

PIC18FXX2
FIGURE 22-8:
BROWN-OUT RESET TIMING
VDD
BVDD
35
VIRVST
Enable Internal Reference Voltage
Internal Reference Voltage stable
36
VBGAP = 1.2V
Typical
TABLE 22-7: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER
AND BROWN-OUT RESET REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min Typ Max Units
Conditions
30
TmcL MCLR Pulse Width (low)
2
—
—
μs
31
TWDT Watchdog Timer Time-out Period
(No Postscaler)
7
18
33
ms
32
TOST Oscillation Start-up Timer Period 1024 TOSC — 1024 TOSC — TOSC = OSC1 period
33
TPWRT Power up Timer Period
28
72
132
ms
34
TIOZ
I/O Hi-impedance from MCLR Low
—
2
—
μs
or Watchdog Timer Reset
35
TBOR Brown-out Reset Pulse Width
200
—
—
μs VDD ≤ BVDD (see
D005)
36
TIVRST Time for Internal Reference
Voltage to become stable
—
20
500
μs
37
TLVD Low Voltage Detect Pulse Width
200
—
—
μs VDD ≤ VLVD (see
D420)
DS39564C-page 274
© 2006 Microchip Technology Inc.