PIC18LF252-ISP Datasheet, PDF (324/332 Pages) Microchip Technology – High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D

PIC18FXX2
PORTE
Analog Port Pins ................................................ 99, 100
Associated Registers ................................................. 99
LATE Register ............................................................ 97
PORTE Register ........................................................ 97
PSP Mode Select (PSPMODE Bit) .................... 95, 100
RE0/RD/AN5 Pin ................................................ 99, 100
RE1/WR/AN6 Pin ............................................... 99, 100
RE2/CS/AN7 Pin ................................................ 99, 100
TRISE Register .......................................................... 97
Postscaler, WDT
Assignment (PSA Bit) ............................................... 105
Rate Select (T0PS2:T0PS0 Bits) ............................. 105
Switching Between Timer0 and WDT ...................... 105
Power-down Mode. See SLEEP
Power-on Reset (POR) ...................................................... 26
Oscillator Start-up Timer (OST) ................................. 26
Power-up Timer (PWRT) ............................................ 26
Prescaler, Capture ........................................................... 119
Prescaler, Timer0 ............................................................. 105
Assignment (PSA Bit) ............................................... 105
Rate Select (T0PS2:T0PS0 Bits) ............................. 105
Switching Between Timer0 and WDT ...................... 105
Prescaler, Timer2 ............................................................. 122
PRO MATE II Universal Device Programmer ................... 255
Product Identification System ........................................... 327
Program Counter
PCL Register .............................................................. 39
PCLATH Register ....................................................... 39
PCLATU Register ....................................................... 39
Program Memory
Interrupt Vector .......................................................... 35
Map and Stack for PIC18F442/242 ............................ 36
Map and Stack for PIC18F452/252 ............................ 36
RESET Vector ............................................................ 35
Program Verification and Code Protection ....................... 207
Associated Registers ............................................... 207
Programming, Device Instructions ................................... 211
PSP.See Parallel Slave Port.
Pulse Width Modulation. See PWM (CCP Module).
PUSH ............................................................................... 240
PWM (CCP Module) ......................................................... 122
Associated Registers ............................................... 123
CCPR1H:CCPR1L Registers ................................... 122
Duty Cycle ................................................................ 122
Example Frequencies/Resolutions ........................... 123
Period ....................................................................... 122
Setup for PWM Operation ........................................ 123
TMR2 to PR2 Match ......................................... 111, 122
Q
Q Clock ............................................................................ 122
R
RAM. See Data Memory
RC Oscillator ...................................................................... 18
RCALL .............................................................................. 241
RCSTA Register
SPEN Bit .................................................................. 165
Register File ....................................................................... 42
Registers
ADCON0 (A/D Control 0) ......................................... 181
ADCON1 (A/D Control 1) ......................................... 182
CCP1CON and CCP2CON
(Capture/Compare/PWM Control) ................... 117
CONFIG1H (Configuration 1 High) .......................... 196
CONFIG2H (Configuration 2 High) .......................... 197
CONFIG2L (Configuration 2 Low) ........................... 197
CONFIG3H (Configuration 3 High) .......................... 198
CONFIG4L (Configuration 4 Low) ........................... 198
CONFIG5H (Configuration 5 High) .......................... 199
CONFIG5L (Configuration 5 Low) ........................... 199
CONFIG6H (Configuration 6 High) .......................... 200
CONFIG6L (Configuration 6 Low) ........................... 200
CONFIG7H (Configuration 7 High) .......................... 201
CONFIG7L (Configuration 7 Low) ........................... 201
DEVID1 (Device ID Register 1) ............................... 202
DEVID2 (Device ID Register 2) ............................... 202
EECON1 (Data EEPROM Control 1) ....................57, 66
File Summary ........................................................46–48
INTCON (Interrupt Control) ........................................ 75
INTCON2 (Interrupt Control 2) ................................... 76
INTCON3 (Interrupt Control 3) ................................... 77
IPR1 (Peripheral Interrupt Priority 1) ......................... 82
IPR2 (Peripheral Interrupt Priority 2) ......................... 83
LVDCON (LVD Control) ........................................... 191
OSCCON (Oscillator Control) .................................... 21
PIE1 (Peripheral Interrupt Enable 1) .......................... 80
PIE2 (Peripheral Interrupt Enable 2) .......................... 81
PIR1 (Peripheral Interrupt Request 1) ....................... 78
PIR2 (Peripheral Interrupt Request 2) ....................... 79
RCON (Register Control) ........................................... 84
RCON (RESET Control) ............................................ 53
RCSTA (Receive Status and Control) ..................... 167
SSPCON1 (MSSP Control 1)
I²C Mode ......................................................... 136
SPI Mode ......................................................... 127
SSPCON2 (MSSP Control 2)
I²C Mode ......................................................... 137
SSPSTAT (MSSP Status)
I²C Mode ......................................................... 135
SPI Mode ......................................................... 126
STATUS ..................................................................... 52
STKPTR (Stack Pointer) ............................................ 38
T0CON (Timer0 Control) ......................................... 103
T1CON (Timer 1 Control) ........................................ 107
T2CON (Timer 2 Control) ........................................ 111
T3CON (Timer3 Control) ......................................... 113
TRISE ........................................................................ 98
TXSTA (Transmit Status and Control) ..................... 166
WDTCON (Watchdog Timer Control) ...................... 203
RESET ................................................................25, 195, 241
Brown-out Reset (BOR) ........................................... 195
MCLR Reset (During SLEEP) .................................... 25
MCLR Reset (Normal Operation) .............................. 25
Oscillator Start-up Timer (OST) ............................... 195
Power-on Reset (POR) .......................................25, 195
Power-up Timer (PWRT) ......................................... 195
Programmable Brown-out Reset (BOR) .................... 25
RESET Instruction ..................................................... 25
Stack Full Reset ......................................................... 25
Stack Underflow Reset .............................................. 25
Watchdog Timer (WDT) Reset .................................. 25
DS39564C-page 322
© 2006 Microchip Technology Inc.