PIC16LF1454 Datasheet, PDF (414/418 Pages) Microchip Technology – 14/20-Pin Flash, 8-Bit USB Microcontrollers with XLP Technology

PIC16(L)F1454/5/9
Timers
Timer1
T1CON.............................................................. 195
T1GCON ........................................................... 196
Timer2
T2CON.............................................................. 201
Timing Diagrams
A/D Conversion ......................................................... 372
A/D Conversion (Sleep Mode) .................................. 373
Acknowledge Sequence ........................................... 242
Asynchronous Reception .......................................... 264
Asynchronous Transmission ..................................... 260
Asynchronous Transmission (Back to Back) ............ 260
Auto Wake-up Bit (WUE) During
Normal Operation.............................................. 277
Auto Wake-up Bit (WUE) During Sleep .................... 277
Automatic Baud Rate Calibration .............................. 275
Baud Rate Generator with Clock Arbitration ............. 235
BRG Reset Due to SDA Arbitration
During Start Condition....................................... 245
Brown-out Reset (BOR) ............................................ 369
Brown-out Reset Situations ........................................ 81
Bus Collision During a Repeated
Start Condition (Case 1) ................................... 246
Bus Collision During a Repeated
Start Condition (Case 2) ................................... 246
Bus Collision During a Start Condition (SCL = 0) ..... 245
Bus Collision During a Stop Condition (Case 1) ....... 247
Bus Collision During a Stop Condition (Case 2) ....... 247
Bus Collision During Start Condition (SDA only) ...... 244
Bus Collision for Transmit and Acknowledge............ 243
CLKOUT and I/O....................................................... 368
Clock Synchronization .............................................. 232
Clock Timing ............................................................. 367
Comparator Output ................................................... 173
Fail-Safe Clock Monitor (FSCM) ................................. 72
First Start Bit Timing ................................................. 236
I²C Bus Data ............................................................. 379
I²C Bus Start/Stop Bits.............................................. 379
I²C Master Mode (7 or 10-Bit Transmission) ............ 239
I²C Master Mode (7-Bit Reception) ........................... 241
I²C Stop Condition Receive or Transmit Mode ......... 242
INT Pin Interrupt.......................................................... 94
Internal Oscillator Switch Timing................................. 65
Repeat Start Condition.............................................. 237
Reset Start-up Sequence............................................ 83
Reset, WDT, OST and Power-up Timer ................... 369
Send Break Character Sequence ............................. 278
SPI Master Mode (CKE = 1, SMP = 1) ..................... 376
SPI Mode (Master Mode) .......................................... 209
SPI Slave Mode (CKE = 0) ....................................... 377
SPI Slave Mode (CKE = 1) ....................................... 377
Synchronous Reception (Master Mode, SREN) ....... 282
Synchronous Transmission....................................... 280
Synchronous Transmission (Through TXEN) ........... 280
Timer0 and Timer1 External Clock ........................... 370
Timer1 Incrementing Edge........................................ 191
Two Speed Start-up .................................................... 70
USART Synchronous Receive (Master/Slave) ......... 375
USART Synchronous Transmission (Master/Slave) . 375
Wake-up from Interrupt ............................................. 104
Timing Parameter Symbology........................................... 366
Timing Requirements
I²C Bus Data ............................................................. 380
I2C Bus Start/Stop Bits ............................................. 379
SPI Mode .................................................................. 378
TMR0 Register.................................................................... 38
TMR1H Register ................................................................. 38
TMR1L Register.................................................................. 38
TMR2 Register.................................................................... 38
TRIS.................................................................................. 352
TRISA Register........................................................... 38, 132
TRISB Register........................................................... 38, 136
TRISC ............................................................................... 139
TRISC Register........................................................... 38, 140
Two-Speed Clock Start-up Mode........................................ 69
TXREG ............................................................................. 259
TXREG Register ................................................................. 39
TXSTA Register.......................................................... 39, 267
BRGH Bit .................................................................. 270
U
Universal Serial Bus
Associated Registers ................................................ 336
BD Address Validation.............................................. 315
BD Byte Count .......................................................... 315
Buffer Descriptor Table (BDT) .................................. 313
Buffer Descriptors
Assignment in Different Buffering Modes ......... 316
Example............................................................ 314
Memory Map..................................................... 316
Register Summary............................................ 317
Buffer Descriptors (BDn)........................................... 313
Interrupt-on-change .................................................. 323
Interrupts .................................................................. 318
and USB Transactions...................................... 318
Oscillator................................................................... 323
Ping-Pong Buffering ................................................. 315
Power Modes............................................................ 320
RAM.......................................................................... 313
Memory Map..................................................... 313
Status and Control .................................................... 310
Universal Serial Bus (USB)............................................... 309
USART
Synchronous Master Mode
Requirements, Synchronous Receive .............. 375
Requirements, Synchronous Transmission...... 375
Timing Diagram, Synchronous Receive ........... 375
Timing Diagram, Synchronous Transmission... 375
USB .................................................................................. 309
USB Operation.................................................................... 66
V
VREF. SEE ADC Reference Voltage
VREGCON Register ......................................................... 106
W
Wake-up on Break ............................................................ 276
Wake-up Using Interrupts ................................................. 104
Watchdog Timer (WDT)...................................................... 82
Associated Registers ................................................ 111
Modes ....................................................................... 108
Specifications ........................................................... 370
WCOL ....................................................... 235, 238, 240, 242
WCOL Status Flag.................................... 235, 238, 240, 242
WDTCON Register ........................................................... 110
WPUA Register................................................................. 134
WPUB Register................................................................. 138
Write Protection .................................................................. 55
WWW Address ................................................................. 415
WWW, On-Line Support ..................................................... 11
DS41639A-page 414
Preliminary
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