PIC16LF1454 Datasheet, PDF (128/418 Pages) Microchip Technology – 14/20-Pin Flash, 8-Bit USB Microcontrollers with XLP Technology

PIC16(L)F1454/5/9
REGISTER 11-6: PMCON2: PROGRAM MEMORY CONTROL 2 REGISTER
W-0/0
bit 7
W-0/0
W-0/0
W-0/0
W-0/0
W-0/0
Program Memory Control Register 2
W-0/0
W-0/0
bit 0
Legend:
R = Readable bit
S = Bit can only be set
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-0
Flash Memory Unlock Pattern bits
To unlock writes, a 55h must be written first, followed by an AAh, before setting the WR bit of the
PMCON1 register. The value written to this register is used to unlock the writes. There are specific
timing requirements on these writes.
TABLE 11-3: SUMMARY OF REGISTERS ASSOCIATED WITH FLASH PROGRAM MEMORY
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
INTCON
PMCON1
PMCON2
GIE
—⁽¹⁾
PEIE
CFGS
TMR0IE
INTE
IOCIE
TMR0IF
LWLO
FREE
WRERR WREN
Program Memory Control Register 2
INTF
WR
IOCIF
RD
PMADRL
PMADRH
PMDATL
—⁽¹⁾
PMADRL<7:0>
PMADRH<6:0>
PMDATL<7:0>
PMDATH
Legend:
Note 1:
—
—
PMDATH<5:0>
— = unimplemented location, read as ‘0’. Shaded cells are not used by Flash program memory.
Unimplemented, read as ‘1’.
Register on
Page
96
127
128
126
126
125
125
TABLE 11-4: SUMMARY OF CONFIGURATION WORD WITH FLASH PROGRAM MEMORY
Name Bits Bit -/7
Bit -/6
Bit 13/5
Bit 12/4
Bit 11/3
Bit 10/2
Bit 9/1
Bit 8/0
Register
on Page
13:8
—
—
FCMEN
IESO CLKOUTEN
BOREN<1:0>
—
CONFIG1
52
7:0
CP
MCLRE PWRTE
WDTE<1:0>
FOSC<2:0>
13:8
—
—
LVP
DEBUG
LPBOR
BORV STVREN PLLEN
CONFIG2
54
7:0 PLLMULT USBLSCLK
CPUDIV<1:0>
—
—
WRT<1:0>
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by Flash program memory.
DS41639A-page 128
Preliminary
 2012 Microchip Technology Inc.