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PIC16LF1454 Datasheet, PDF (39/418 Pages) Microchip Technology – 14/20-Pin Flash, 8-Bit USB Microcontrollers with XLP Technology
PIC16(L)F1454/5/9
TABLE 3-12: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addres
s
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on all
other
Resets
Bank 2
10Ch
10Dh
10Eh
LATA
LATB(1)
LATC
—
LATB7
LATC7(1)
—
LATB6
LATC6(1)
LATA5
LATB5
LATC5
LATA4
LATB4
LATC4
—
—
LATC3
—
—
LATC2
—
—
LATC1
—
—
LATC0
--xx ---- --uu ----
xxxx ---- uuuu ----
xxxx xxxx uuuu uuuu
10Fh —
Unimplemented
—
—
110h —
Unimplemented
111h CM1CON0(2)
C1ON
C1OUT
C1OE
C1POL
—
112h CM1CON1(2) C1INTP C1INTN
C1PCH<1:0>
—
113h CM2CON0(2)
C2ON
C2OUT
C2OE
C2POL
—
114h CM2CON1(2) C2INTP C2INTN
C2PCH<1:0>
—
115h CMOUT(2)
—
—
—
—
—
C1SP
C2SP
—
C1HYS
C1SYNC
C1NCH<2:0>
C2HYS
C2SYNC
C2NCH<2:0>
MC2OUT
MC1OUT
—
—
0000 -100 0000 -100
0000 -000 0000 -000
0000 -100 0000 -100
0000 -000 0000 -000
---- --00 ---- --00
116h
117h
118h
119h
BORCON
FVRCON(2)
DACCON0(2)
DACCON1(2)
SBOREN
FVREN
DACEN
—
BORFS
FVRRDY
—
—
—
TSEN
DACOE1
—
—
TSRNG
DACOE2
—
—
CDAFVR<1:0>
DACPSS<1:0>
DACR<4:0>
—
BORRDY
ADFVR<1:0>
—
—
10-- ---q uu-- ---u
0q00 0000 0q00 0000
0-00 00-- 0-00 00--
---0 0000 ---0 0000
11Ah
to —
11Ch
Unimplemented
11Dh APFCON
CLKRSEL SDOSEL(1) SSSEL
—
T1GSEL P2SEL(1)
—
—
—
—
000- --00 000- --00
11Eh —
Unimplemented
—
—
11Fh —
Unimplemented
—
—
Bank 3
18Ch ANSELA(2)
18Dh ANSELB(1)
18Eh ANSELC(2)
—
—
ANSC7(1)
—
—
ANSC6(1)
—
ANSB5
—
ANSA4
ANSB4
—
—
—
ANSC3
—
—
ANSC2
—
—
ANSC1
—
—
ANSC0
---1 ---- ---1 ----
--11 ---- --11 ----
11-- 1111 11-- 1111
18Fh —
Unimplemented
—
—
190h —
Unimplemented
—
—
191h
192h
PMADRL
PMADRH
Flash Program Memory Address Register Low Byte
—(2) Flash Program Memory Address Register High Byte
0000 0000 0000 0000
1000 0000 1000 0000
193h PMDATL
Flash Program Memory Read Data Register Low Byte
xxxx xxxx uuuu uuuu
194h
195h
PMDATH
PMCON1
—
—(2)
—
CFGS
Flash Program Memory Read Data Register High Byte
LWLO
FREE WRERR WREN
WR
--xx xxxx --uu uuuu
RD
1000 x000 1000 q000
196h PMCON2
Flash Program Memory Control Register 2
0000 0000 0000 0000
197h VREGCON(1)
—
—
—
—
—
—
VREGPM Reserved ---- --01 ---- --01
198h —
Unimplemented
—
—
199h RCREG
USART Receive Data Register
0000 0000 0000 0000
19Ah TXREG
USART Transmit Data Register
0000 0000 0000 0000
19Bh SPBRGL
Baud Rate Generator Data Register Low
0000 0000 0000 0000
19Ch SPBRGH
Baud Rate Generator Data Register High
0000 0000 0000 0000
19Dh RCSTA
SPEN
RX9
SREN
CREN
ADDEN
FERR
OERR
RX9D 0000 000x 0000 000x
19Eh TXSTA
CSRC
TX9
TXEN
SYNC SENDB BRGH
TRMT
TX9D
0000 0010 0000 0010
19Fh BAUDCON
ABDOVF RCIDL
—
SCKP
BRG16
—
WUE
ABDEN 01-0 0-00 01-0 0-00
Legend:
Note 1:
2:
3:
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved. Shaded locations are unimplemented, read as ‘0’.
PIC16(L)F1459 only.
PIC16(L)F1455/9 only.
Unimplemented, read as ‘1’.
 2012 Microchip Technology Inc.
Preliminary
DS41639A-page 39