PIC16LF1454 Datasheet, PDF (19/418 Pages) Microchip Technology – 14/20-Pin Flash, 8-Bit USB Microcontrollers with XLP Technology

PIC16(L)F1454/5/9
TABLE 1-4: PIC16(L)F1459 PINOUT DESCRIPTION
Name
Function
Input Output
Type Type
Description
RA0/D+/ICSPDAT⁽³⁾
RA0
TTL CMOS General purpose I/O.
D+
XTAL XTAL USB differential plus line.
RA1/D-/ICSPCLK⁽³⁾
ICSPDAT
RA1
ST CMOS ICSP™ Data I/O.
TTL CMOS General purpose I/O.
D-
XTAL XTAL USB differential minus line.
RA3/VPP/T1G⁽²⁾/SS⁽²⁾/MCLR
ICSPCLK ST
RA3
TTL
— ICSP Programming Clock.
— General purpose input with IOC and WPU.
VPP
HV
— Programming voltage.
T1G
ST
— Timer1 Gate input.
SS
ST
— Slave Select input.
MCLR
ST
— Master Clear with internal pull-up.
RA4/AN3/SOSCO/CLKOUT/
T1G⁽¹⁾/CLKR⁽¹⁾/OSC2
RA4
TTL CMOS General purpose I/O.
AN3
AN
— A/D Channel input.
SOSCO XTAL XTAL Secondary Oscillator Connection.
CLKOUT
— CMOS FOSC/4 output.
T1G
ST
— Timer1 Gate input.
CLKR
— CMOS Clock reference output.
OSC2
XTAL XTAL Primary Oscillator connection.
RA5/CLKIN/SOSCI/T1CKI/
OSC1
RA5
CLKIN
TTL CMOS General purpose I/O.
CMOS — External clock input (EC mode).
SOSCI XTAL XTAL Secondary Oscillator Connection.
T1CKI
ST
— Timer1 clock input.
OSC1
XTAL XTAL Primary Oscillator Connection.
RB4/AN10/SDA/SDI
RB4
TTL CMOS General purpose I/O.
AN10
SDA
AN
— A/D Channel input.
I²C
OD I²C data input/output.
SDI
CMOS — SPI data input.
RB5/AN11/RX/DT
RB5
TTL CMOS General purpose I/O.
AN11
AN
— A/D Channel input.
RX
ST
— USART asynchronous input.
DT
ST CMOS USART synchronous data.
RB6/SCL/SCK
RB6
TTL CMOS General purpose I/O.
SCL
I²C
OD I²C™ clock.
SCK
ST CMOS SPI clock.
RB7/TX/CK
RB7
TTL CMOS General purpose I/O.
TX
— CMOS USART asynchronous transmit.
CK
ST CMOS USART synchronous clock.
Legend: AN = Analog input or output CMOS = CMOS compatible input or output
OD = Open Drain
TTL = TTL compatible input ST = Schmitt Trigger input with CMOS levels I²C™ = Schmitt Trigger input with I²C
HV = High Voltage
XTAL = Crystal
levels
Note 1: Default location for peripheral pin function. Alternate location can be selected using the APFCON register.
2: Alternate location for peripheral pin function selected by the APFCON register.
3: LVP support for PIC18(L)F1XK50 legacy designs.
 2012 Microchip Technology Inc.
Preliminary
DS41639A-page 19