PIC16LF1454 Datasheet, PDF (282/418 Pages) Microchip Technology – 14/20-Pin Flash, 8-Bit USB Microcontrollers with XLP Technology

PIC16(L)F1454/5/9
FIGURE 23-12: SYNCHRONOUS RECEPTION (MASTER MODE, SREN)
RX/DT
pin
TX/CK pin
(SCKP = 0)
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
TX/CK pin
(SCKP = 1)
Write to
bit SREN
SREN bit
CREN bit ^{‘0’}
‘0’
RCIF bit
(Interrupt)
Read
RCREG
Note:
Timing diagram demonstrates Sync Master mode with bit SREN = 1 and bit BRGH = 0.
TABLE 23-8: SUMMARY OF REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER
RECEPTION
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
BAUDCON ABDOVF
INTCON
GIE
PIE1
TMR1GIE
PIR1
TMR1GIF
RCREG
RCIDL
PEIE
ADIE⁽²⁾
ADIF⁽²⁾
—
SCKP BRG16
—
TMR0IE INTE IOCIE TMR0IF
RCIE
TXIE SSP1IE
—
RCIF
TXIF SSP1IF
—
EUSART Receive Data Register
WUE
INTF
TMR2IE
TMR2IF
ABDEN
IOCIF
TMR1IE
TMR1IF
269
96
97
99
262*
RCSTA
SPEN
RX9
SREN CREN ADDEN FERR OERR RX9D
268
SPBRGL
BRG<7:0>
270*
SPBRGH
TRISC
BRG<15:8>
TRISC7⁽¹⁾ TRISC6⁽¹⁾ TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0
270*
140
TXSTA
CSRC
TX9
TXEN SYNC SENDB BRGH TRMT TX9D
267
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used for synchronous master reception.
* Page provides register information.
Note 1: PIC16(L)F1459 only.
2: PIC16(L)F1455/9 only.
DS41639A-page 282
Preliminary
 2012 Microchip Technology Inc.