IS75V16F128GS32 Datasheet, PDF (46/52 Pages) Integrated Silicon Solution, Inc – 3.0 Volt Multi-Chip Package (MCP) 128 Mbit Simultaneous Operation Flash Memory and 32 Mbit Pseudo Static RAM

IS75V16F128GS32
ISSI ^®
PSRAM READ / WRITE TIMING (READ = OE Control, WRITE = WE Control)
Address
CE1r
Low
WE
UB, LB
tASO
tRC
Read Address
tWR
tOEH
tBH
tBSO
tOHAH
Write Address
tAS
tOHBH
tBS
tOE
tOES
OE
DQ
tDH
tOLZ
tOHZ
tOH
Write Data Input
Read Data Output
Note: CE1r can be tied to Low for WE and OE controlled operation. When CE1r is tied to Low, output is
exclusively controlled OE.
46
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
PRELIMINARY INFORMATION Rev. 00D
03/24/03