IS75V16F128GS32 Datasheet, PDF (44/52 Pages) Integrated Silicon Solution, Inc – 3.0 Volt Multi-Chip Package (MCP) 128 Mbit Simultaneous Operation Flash Memory and 32 Mbit Pseudo Static RAM

IS75V16F128GS32
ISSI ^®
PSRAM WRITE TIMING (WE Control, Continuous Write Operation)
ADDRESS
CE1r
Address Valid
tWC
tOHAH
tAS
tAH
tAS
WE
UB, LB
OE
tOHCL tCS
tBH
tBS
tOES
tWP
tWR
tBH
tBS
tOHz
DQ
(Input)
Note: CE2r and PE must be High during write cycle.
PSRAM READ / WRITE TIMING (CE1r Control)
tDS
tDH
Valid Data Input
ADDRESS
CE1r
WE
tCHAH
Write Address
tAS
tAH
tWC
Read Address
tASC
tCP
tWH
tWS
tCW
tWRC
tWH
tWS
tCLOL
UB, LB
tCHBH
tBS
tBH
tBSO
OE
DQ
tOHCL
tOH
tCHZ
Read Data Output
tDS
tDH
Valid Data Input
tOLz
Note: Write address is valid from either CE1r or WE of last falling edge.
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Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
PRELIMINARY INFORMATION Rev. 00D
03/24/03