IS75V16F128GS32 Datasheet, PDF (40/52 Pages) Integrated Silicon Solution, Inc – 3.0 Volt Multi-Chip Package (MCP) 128 Mbit Simultaneous Operation Flash Memory and 32 Mbit Pseudo Static RAM

IS75V16F128GS32
ISSI ^®
PSRAM POWER DOWN PARAMETERS
Parameter
CE2r Low Setup Time for Power down Entry
CE2r Low Hold Time after Power down Entry
CE1r High Hold Time Following CE2r High after Power down Exit
SLEEP Mode only
CE1r High Setup Time following CE2r High after Power down Exit
(Except for SLEEP Mode)
CE1r High Setup Time following CE2r High after Power down Exit
CE1r High to PE Low Setup Time ⁽¹⁾
PE Power Down Program Pulse Width ⁽¹⁾
PE High to CE1r Low Hold Time ⁽¹⁾
Address Setup Time to PE High ⁽¹⁾
Address Setup Time from PE High ⁽¹⁾
Note:
1. Applies to Power Down Program.
Symbol
tCSP
tC2LP
tCHH
tCHHN
tCHS
tEPS
tEP
tEPH
tEAS
tEAH
Value
Min. Max.
Unit
10
—
ns
70
—
ns
350
—
µs
1
—
µs
10
—
ns
70
—
ns
70
—
ns
70
—
ns
15
—
ns
0
—
ns
PSRAM OTHER TIMING PARAMETERS
Parameter
Symbol
Value
Min. Max.
CE1r High to OE Invalid for Standby Entry
tCHOX
10
—
CE1r High to WE Invalid for Standby Entry⁽¹⁾
tCHWX
10
—
CE2r Low Hold Time after Power-up⁽²⁾
tC2LH
50
—
CE2r High Hold Time after Power-up⁽³⁾
tC2HL
50
—
CE1r High Hold Time Following CE2r High after Power-up⁽²⁾
tCHH
350
—
Input Transition Time⁽⁴⁾
tT
1
25
Notes:
1. Unintended data may be written into any address location if tCHWX is not satisfied.
2. Must satisfy tCHH (Min) after tC2LH (Min) .
3. Requires Power Down mode entry and exit after tC2HL.
4. Input Transition Time (tT) at AC testing is 5 ns as shown below. If actual tT is longer than 5 ns,
it may violate some timing parameters.
PSRAM AC TEST CONDITIONS
Unit
ns
ns
µs
µs
µs
ns
Parameter
Input High Level
Input Low Level
Input Timing Measurement Level
Input Transition Time
Symbol
VIH
VIL
VREF
tT
Condition
VCCr = 2.7V to 3.3V
VCCr = 2.7V to 3.3V
VCCr = 2.7V to 3.3V
Between VIL and VIH
Value
Unit
2.3
V
0.4
V
1.3
V
5
ns
40
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
PRELIMINARY INFORMATION Rev. 00D
03/24/03