IS75V16F128GS32 Datasheet, PDF (41/52 Pages) Integrated Silicon Solution, Inc – 3.0 Volt Multi-Chip Package (MCP) 128 Mbit Simultaneous Operation Flash Memory and 32 Mbit Pseudo Static RAM

IS75V16F128GS32
ISSI ^®
PSRAM READ TIMING (OE Control Access)
ADDRESS
tRC
ADDRESS VALID
CE1r
tCE
tOHAH
tRC
ADDRESS VALID
tASO
tOHAH
OE
tCLOL
tOE
tASO
tOLCH
tOE
tOP
tBSO
LB / UB
tOHBH
tBSO
tOHBH
DQ
(Output)
tOLZ
tOHZ
tOH
tOLZ
tOHZ
tOH
VALID DATA OUTPUT
VALID DATA OUTPUT
Note: CE2r, PE and WE must be High during read cycle. Either or both LB and UB must be Low when both CE1r and OE are Low.
PSRAM READ TIMING (CE1r Control Access)
tRC
tRC
ADDRESS
tASC
ADDRESS VALID
tCE
tCHAH
ADDRESS VALID
tASC
tCHAH
CE1r
tCE
tCP
OE
tBSC
LB / UB
tCHBH
tBSC
tCHBH
tCLZ
DQ
(Output)
tCHZ
tOH
tCLZ
tCHZ
tOH
VALID DATA OUTPUT
VALID DATA OUTPUT
Note: CE2r, PE and WE must be High during read cycle. Either or both LB and UB must be Low when both CE1r and OE are Low.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
41
PRELIMINARY INFORMATION Rev. 00D
03/24/03