IS75V16F128GS32 Datasheet, PDF (31/52 Pages) Integrated Silicon Solution, Inc – 3.0 Volt Multi-Chip Package (MCP) 128 Mbit Simultaneous Operation Flash Memory and 32 Mbit Pseudo Static RAM

IS75V16F128GS32
ISSI ^®
FLASH BACK-to-BACK READ/WRITE TIMING DIAGRAM - FLASH 1 or FLASH 2
ADDRESS
CEf1
OE
WE
DQ
Read
tRC
BA1
Command
tWC
BA2
(555h)
Read
tRC
BA1
tAS
tAH
tACC
tCE
Command
tWC
BA2
(PA)
Read
tRC
BA1
tAHT
Read
tRC
BA2
(PA)
tAS
tOE
tGHWL
tDF
tWP ^tOEH
Valid
Output
tDS
tDH
Valid
Input
(A0h)
tDF
Valid
Output
Valid
Input
(PD)
tCEPH
Valid
Output
Status
Note:
1. This is example of Read for Bank 1 and Embedded Algorithm (program) for Bank 2.
BA1: Address of Virtual Bank 1.
BA2: Address of Virtual Bank 2.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
31
PRELIMINARY INFORMATION Rev. 00D
03/24/03