IS75V16F128GS32 Datasheet, PDF (3/52 Pages) Integrated Silicon Solution, Inc – 3.0 Volt Multi-Chip Package (MCP) 128 Mbit Simultaneous Operation Flash Memory and 32 Mbit Pseudo Static RAM

IS75V16F128GS32
ISSI ^®
PIN CONFIGURATION (128 Mb Flash and 32 Mb PSRAM)
PACKAGE CODE: B 107 BALL FBGA (Top View) (9.00 mm x 10.00 mm Body, 0.8 mm Ball Pitch)
1 2 3 4 5 6 7 8 9 10
A
NC
NC NC
B
NC GND RY/BY2 CEf2 NC NC NC NC NC
C
NC ^NC A7 LB WP/ACC WE A8 A11 NC NC
D
NC A3 A6 UB RESET1CE2r A19 A12 A15 ^NC
E
NC A2 _{A5 A18} RY/BY1 _A20 A9 A13 A21 NC
F
NC A1 A4 A17 DU DU A10 A14 NC NC
G
NC A0 GND DQ1 DU DU DQ6 PE A16 NC
H
NC CEf1 _{OE DQ9} DQ3 _{DQ4 DQ13 DQ15} Vccf1 NC
J
NC CE1r DQ0 DQ10 Vccf1 Vccr DQ12 DQ7 GND NC
K
NC NC DQ8 DQ2 DQ11 NC DQ5 DQ14 NC NC
L
NC NC RESET2 GND Vccf2 NC NC NC NC NC
M
NC NC
NC NC
Shared
Flash Only
PSRAM Only
PIN DESCRIPTIONS
A0-A20
A21
DQ0-DQ15
RESET1
RESET2
CE1r, CE2r
CEf1
CEf2
OE
WE
PE
Address Inputs, Common
Address Input, Both Flash
Data Inputs/Outputs, Common
Reset, Flash1
Reset, Flash2
Chip Enable, PSRAM
Chip Enable, Flash1
Chip Enable, Flash2
Output Enable, Common
Write Enable, Common
Partial Enable, PSRAM
LB
UB
WP/ACC
RY/BY1
RY/BY2
NC
DU
Vccf1
Vccf2
Vccr
GND
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
PRELIMINARY INFORMATION Rev. 00D
03/24/03
Lower-byte Control, PSRAM
Upper-byte Control, PSRAM
Write Protect/Acceleration Pin, Both Flash
Ready/Busy Output , Flash1
Ready/Busy Output , Flash2
No Connection
Do Not Use
Power, Flash1
Power, Flash2
Power, PSRAM
Ground, Common
3