IS75V16F128GS32 Datasheet, PDF (43/52 Pages) Integrated Silicon Solution, Inc – 3.0 Volt Multi-Chip Package (MCP) 128 Mbit Simultaneous Operation Flash Memory and 32 Mbit Pseudo Static RAM

IS75V16F128GS32
PSRAM WRITE TIMING (CE1r Control)
Address
CE1r
WE
UB, LB
Address Valid
tAS
tAH
tWS
tCW
tBS
tWC
tAS
tWH
tWRC
tWS
tBH
tBS
OE
DQ
(Input)
tOHCL
tDS
tDH
Valid Data Input
Note: CE2r and PE must be High during write cycle.
PSRAM WRITE TIMING (WE Control, Single Write Operation)
Address
CE1r
WE
tOHAH
Address Valid
tAH
tAS
tOHCL tCS
tWP
tWC
tAS
tCH
tCP
tWR
UB, LB
OE
DQ
(Input)
tOHBH tBS
tOES
tOHz
tBH
tDS
tDH
Valid Data Input
Note: CE2r and PE must be High during write cycle.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
PRELIMINARY INFORMATION Rev. 00D
03/24/03
ISSI ^®
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