BD82HM55-SLGZS Datasheet, PDF (578/956 Pages) Intel Corporation – Intel® 5 Series Chipset and Intel® 3400 Series Chipset

SATA Controller Registers (D31:F2)
14.1.12 PCNL_BAR—Primary Control Block Base Address
Register (SATA–D31:F2)
Address Offset: 14h–17h
Default Value: 00000001h
.
Attribute:
Size:
R/W, RO
32 bits
Bit
Description
31:16 Reserved
15:2
Base Address—R/W. This field provides the base address of the I/O space (4
consecutive I/O locations).
1 Reserved
0
Resource Type Indicator (RTE)—RO. Hardwired to 1 to indicate a request for I/O
space.
NOTE: This 4-byte I/O space is used in native mode for the Primary Controller’s Command Block.
14.1.13 SCMD_BAR—Secondary Command Block Base Address
Register (IDE D31:F2)
Address Offset: 18h–1Bh
Default Value: 00000001h
Attribute:
Size:
R/W, RO
32 bits
Bit
Description
31:16
15:3
2:1
0
Reserved
Base Address—R/W. This field provides the base address of the I/O space (8
consecutive I/O locations).
Reserved
Resource Type Indicator (RTE)—RO. Hardwired to 1 to indicate a request for I/O
space.
NOTE: This 4-byte I/O space is used in native mode for the Secondary Controller’s Command
Block.
14.1.14 SCNL_BAR—Secondary Control Block Base Address
Register (IDE D31:F2)
Address Offset: 1Ch–1Fh
Default Value: 00000001h
Attribute:
Size:
R/W, RO
32 bits
Bit
Description
31:16
15:2
1
0
Reserved
Base Address—R/W. This field provides the base address of the I/O space (4
consecutive I/O locations).
Reserved
Resource Type Indicator (RTE)—RO. Hardwired to 1 to indicate a request for I/O
space.
NOTE: This 4-byte I/O space is used in native mode for the Secondary Controller Command Block.
578
Datasheet