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BD82HM55-SLGZS Datasheet, PDF (267/956 Pages) Intel Corporation – Intel® 5 Series Chipset and Intel® 3400 Series Chipset
Functional Description
5.24.5.2
Note:
BIOS Range Write Protection
The PCH provides a method for blocking writes to specific ranges in the SPI flash when
the Protected BIOS Ranges are enabled. This is achieved by checking the Opcode type
information (which can be locked down by the initial Boot BIOS) and the address of the
requested command against the base and limit fields of a Write Protected BIOS range.
Once BIOS has locked down the Protected BIOS Range registers, this mechanism
remains in place until the next system reset.
5.24.5.3
SMI# Based Global Write Protection
The PCH provides a method for blocking writes to the SPI flash when the Write
Protected bit is cleared (that is, protected). This is achieved by checking the Opcode
type information (which can be locked down by the initial Boot BIOS) of the requested
command.
The Write Protect and Lock Enable bits interact in the same manner for SPI BIOS as
they do for the FWH BIOS.
5.24.6
Flash Device Configurations
The PCH-based platform must have a SPI flash connected directly to the PCH with a
valid descriptor and Intel® Management Engine Firmware. BIOS may be stored in other
locations such as Firmware Hub and SPI flash hooked up directly to an embedded
controller for Mobile platforms. Note this will not avoid the direct SPI flash connected to
PCH requirement.
5.24.7
SPI Flash Device Recommended Pinout
The table below contains the recommended serial flash device pin-out for an 8-pin
device. Use of the recommended pin-out on an 8-pin device reduces complexities
involved with designing the serial flash device onto a motherboard and allows for
support of a common footprint usage model (see Section 5.24.8.1).
Table 5-56. Recommended Pinout for 8-Pin Serial Flash Device
Pin #
Signal
1
Chips Select
2
Data Output
3
Write Protect
4
Ground
5
Data Input
6
Serial Clock
7
Hold / Reset
8
Supply Voltage
Although an 8-pin device is preferred over a 16-pin device due to footprint
compatibility, the following table contains the recommended serial flash device pin-out
for a 16-pin SOIC.
Datasheet
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