BD82HM55-SLGZS Datasheet, PDF (354/956 Pages) Intel Corporation – Intel® 5 Series Chipset and Intel® 3400 Series Chipset

Electrical Characteristics
Table 8-28. SATA Interface Timings
Sym
Parameter
Min
Max
Units Notes Figure
UI Gen I Operating Data Period
666.43 670.23
ps
UI-2
Gen II Operating Data Period (3Gb/
s)
333.21
335.11
ps
t120 Rise Time
0.15
0.41
UI
1
t121 Fall Time
0.15
0.41
UI
2
t122 TX differential skew
—
20
ps
t123 COMRESET
310.4
329.6
ns
3
t124 COMWAKE transmit spacing
103.5
109.9
ns
3
t125 OOB Operating Data period
646.67 686.67
ns
4
NOTES:
1.
20% – 80% at transmitter.
2.
80% – 20% at transmitter.
3.
As measured from 100 mV differential crosspoints of last and first edges of burst.
4.
Operating data period during Out-Of-Band burst transmissions.
Table 8-29. SMBus Timing (Sheet 1 of 2)
Sym
Parameter
t130
t130_SM
LFM
t131
t131_SM
LFM
t132
t132_SM
LFM
t133
t133_SM
LFM
t134
t134_SM
LFM
t135
t135_SM
LFM
t136
t137
Bus Free Time Between Stop and Start
Condition
Bus Free Time Between Stop and Start
Condition
Hold Time after (repeated) Start Condition.
After this period, the first clock is
generated.
Hold Time after (repeated) Start Condition.
After this period, the first clock is
generated.
Repeated Start Condition Setup Time
Repeated Start Condition Setup Time
Stop Condition Setup Time
Stop Condition Setup Time
Data Hold Time
Data Hold Time
Data Setup Time
Data Setup Time
Device Time Out
Cumulative Clock Low Extend Time (slave
device)
Min
4.7
1.3
4.0
0.6
4.7
0.6
4.0
0.6
0
0
250
100
25
—
Max
—
—
—
—
—
—
—
—
—
—
—
—
35
25
Units Notes Fig
µs
8-18
µs
5
8-18
µs
8-18
µs
5
8-18
µs
8-18
µs
5
8-18
µs
8-18
µs
5
8-18
ns
4
8-18
ns
4, 5 8-18
ns
8-18
ns
5
8-18
ms
1
ms
2
8-19
354
Datasheet