BD82HM55-SLGZS Datasheet, PDF (400/956 Pages) Intel Corporation – Intel® 5 Series Chipset and Intel® 3400 Series Chipset

Chipset Configuration Registers
10.1.22 DMC—DMI Miscellaneous Control Register
Offset Address: 2010–2013h
Default Value: 00000002h
Attribute:
Size:
R/W
32-bit
Bit
31:20
19
18:0
Description
Reserved
DMI Misc. Control Field 1—R/W. BIOS shall always program this field.
0 = Disable DMI Power Savings.
1 = Enable DMI Power Savings.
Reserved
10.1.23
CIR6—Chipset Initialization Register 6
Offset Address: 2024–2027h
Default Value: 0B4030C0h
Attribute:
Size:
R/W
32-bit
Bit
Description
31:24
(Mobile
Only)
Reserved
23:21
(Mobile
Only)
CIR6 Field 2—R/W. BIOS must program this field to 011b.
20:8
(Mobile
Only)
Reserved
31:8
(Desktop Reserved
Only)
7
CIR6 Field 1—R/W. BIOS must clear this bit.
6:0
Reserved
10.1.24 DMC2—DMI Miscellaneous Control Register 2
Offset Address: 2324–2327h
Default Value: 0FFF0FFFh
Attribute:
Size:
R/W
32-bit
Bit
31:28
27:16
15:0
Description
Reserved
DMI Misc. Control Field 2—R/W. BIOS shall always program this field.
Reserved
400
Datasheet