BD82HM55-SLGZS Datasheet, PDF (381/956 Pages) Intel Corporation – Intel® 5 Series Chipset and Intel® 3400 Series Chipset

Register and Memory Mapping
Table 9-2.
Fixed I/O Ranges Decoded by Intel^® PCH (Sheet 3 of 3)
I/O
Address
BCh–BDh
C0h–D1h
D2h–DDh
DEh–DFh
F0h
Read Target
Interrupt Controller
DMA Controller
RESERVED¹
DMA Controller
FERR# / Interrupt
Controller
Write Target
Interrupt Controller
DMA Controller
DMA Controller
DMA Controller
FERR# / Interrupt Controller
170h–177h
SATA Controller or PCI
SATA Controller or PCI
1F0h–1F7h
200h-207h
208h-20Fh
376h
SATA Controller or PCI
Gameport Low
Gameport High
SATA Controller or PCI
SATA Controller or PCI
Gameport Low
Gameport High
SATA Controller or PCI
3F6h
4D0h–4D1h
CF9h
SATA Controller or PCI
Interrupt Controller
Reset Generator
NOTE:
1.
See Section 13.7.2.
SATA Controller or PCI
Interrupt Controller
Reset Generator
Internal Unit
Interrupt
DMA
DMA
DMA
Processor I/F
Forwarded to
SATA
Forwarded to
SATA
Forwarded to LPC
Forwarded to LPC
Forwarded to
SATA
Forwarded to
SATA
Interrupt
Processor I/F
Datasheet
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