TDA5235 Datasheet, PDF (239/259 Pages) Infineon Technologies AG – Enhanced Sensitivity Double-Configuration Receiver with Digital Baseband Processing

TDA5235
Appendix
Register Description
Field
Bits
IMEOMB
7
IMMIDFB
6
IMFSYNCB 5
IMWUB
4
IMEOMA
3
IMMIDFA
2
IMFSYNCA 1
IMWUA
0
Type
w
w
w
w
w
w
w
w
Description
Mask Interrupt on "End of Message" for Configuration B
0_B Interrupt enabled
1_B Interrupt disabled
Reset: 0_H
Mask Interrupt on "Message ID Found" for Configuration B
0_B Interrupt enabled
1_B Interrupt disabled
Reset: 0_H
Mask Interrupt on "Frame Sync" for Configuration B
0_B Interrupt enabled
1_B Interrupt disabled
Reset: 0_H
Mask Interrupt on "Wake-up" for Configuration B
0_B Interrupt enabled
1_B Interrupt disabled
Reset: 0_H
Mask Interrupt on "End of Message" for Configuration A
0_B Interrupt enabled
1_B Interrupt disabled
Reset: 0_H
Mask Interrupt on "Message ID Found" for Configuration A
0_B Interrupt enabled
1_B Interrupt disabled
Reset: 0_H
Mask Interrupt on "Frame Sync" for Configuration A
0_B Interrupt enabled
1_B Interrupt disabled
Reset: 0_H
Mask Interrupt on "Wake-up" for Configuration A
0_B Interrupt enabled
1_B Interrupt disabled
Reset: 0_H
Self Polling Mode Active Periods Register
SPMAP
Self Polling Mode Active Periods Register
Offset
096_H



8186('

630$3
Z
Reset Value
01_H

Data Sheet
239
V1.0, 2010-02-19