TDA5235 Datasheet, PDF (170/259 Pages) Infineon Technologies AG – Enhanced Sensitivity Double-Configuration Receiver with Digital Baseband Processing

TDA5235
Appendix
Register Overview
Table 1 Register Overview (cont’d)
Register Short Name Register Long Name
Offset Address
RSSIPMF
SPWR
NPWR
B_MID0
B_MID1
B_MID2
B_MID3
B_MID4
B_MID5
B_MID6
B_MID7
B_MID8
B_MID9
B_MID10
B_MID11
B_MID12
B_MID13
B_MID14
B_MID15
B_MID16
B_MID17
B_MID18
B_MID19
B_MIDC0
B_MIDC1
B_IF1
B_WUC
B_WUPAT0
B_WUPAT1
B_WUBCNT
B_WURSSITH1
B_WURSSIBL1
RSSI Peak Memory Filter Readout Register
Signal Power Readout Register
Noise Power Readout Register
Message ID Register 0
Message ID Register 1
Message ID Register 2
Message ID Register 3
Message ID Register 4
Message ID Register 5
Message ID Register 6
Message ID Register 7
Message ID Register 8
Message ID Register 9
Message ID Register 10
Message ID Register 11
Message ID Register 12
Message ID Register 13
Message ID Register 14
Message ID Register 15
Message ID Register 16
Message ID Register 17
Message ID Register 18
Message ID Register 19
Message ID Control Register 0
Message ID Control Register 1
IF1 Register
Wake-Up Control Register
Wake-Up Pattern Register 0
Wake-Up Pattern Register 1
Wake-Up Bit or Chip Count Register
RSSI Wake-Up Threshold for Channel 1 Register
RSSI Wake-Up Blocking Level Low Channel 1
Register
0BB_H
0BC_H
0BD_H
100_H
101_H
102_H
103_H
104_H
105_H
106_H
107_H
108_H
109_H
10A_H
10B_H
10C_H
10D_H
10E_H
10F_H
110_H
111_H
112_H
113_H
114_H
115_H
116_H
117_H
118_H
119_H
11A_H
11B_H
11C_H
B_WURSSIBH1
RSSI Wake-Up Blocking Level High Channel 1
Register
11D_H
B_SIGDETSAT
B_WULOT
B_SYSRCTO
B_TOTIM_SYNC
Signal Detector Saturation Threshold Register
Wake-Up on Level Observation Time Register
Synchronization Search Time-Out Register
SYNC Timeout Timer Register
124_H
125_H
126_H
127_H
Page Number
256
257
257
Data Sheet
170
V1.0, 2010-02-19