TDA5235 Datasheet, PDF (210/259 Pages) Infineon Technologies AG – Enhanced Sensitivity Double-Configuration Receiver with Digital Baseband Processing

Signal Detector Configuration Register
TDA5235
Appendix
Register Description
A_SIGDETCFG
Signal Detector Configuration Register

8186('

Offset
043_H


5HV
Reset Value
00_H

6'/25(
Z

6'&17
Z

6'&17
Z
Field
Bits
UNUSED
7:4
SDLORE
2
SDCNT1
1
SDCNT0
0
Type
-
w
w
w
Description
UNUSED
Reset: 0_H
Source selection of Signal Power Readout Register
0_B Signal Power for A_SIGDET0/1
1_B Signal for minimal usable FSK deviation, the sigdet low level can
be read out with SPWR register
Reset: 0_H
Signal Detector Threshold Counter for Wakeup
0_B Disabled
1_B 1/2 bit
Reset: 0_H
Signal Detector Threshold Counter for Run Mode
0_B Disabled
1_B 1/2 bit
Reset: 0_H
FSK Noise Detector Threshold Register
A_NDTHRES
FSK Noise Detector Threshold Register

Offset
044_H
1'7+5(6
Z
Field
Bits
NDTHRES 7:0
Type
w
Description
FSK Noise Detector Threshold
Reset: 00_H
Reset Value
00_H

Data Sheet
210
V1.0, 2010-02-19