ICS1892 Datasheet, PDF (5/148 Pages) Integrated Circuit Systems – 10Base-T/100Base-TX Integrated PHYceiver

ICS1892
Table of Contents
Table of Contents
Section
8.5
8.5.1
8.5.2
8.5.3
8.6
8.6.1
8.6.2
8.6.3
8.6.4
8.6.5
8.7
8.7.1
8.7.2
8.7.3
8.7.4
8.7.5
8.8
8.8.1
8.8.2
8.8.3
8.8.4
8.8.5
8.8.6
8.9
8.9.1
8.9.2
8.9.3
8.9.4
8.9.5
8.9.6
8.10
8.10.1
8.10.2
8.10.3
8.10.4
8.10.5
Title
Page
Register 3: PHY Identifier Register ............................................................ 73
OUI bits 19-24 (bits 3.15:10) ..................................................................... 73
Manufacturer's Model Number (bits 3.9:4) ................................................ 73
Revision Number (bits 3.3:0) ..................................................................... 74
Register 4: Auto-Negotiation Register ....................................................... 75
Next Page (bit 4.15) ................................................................................... 75
IEEE Reserved Bit (bit 4.14) ...................................................................... 76
Remote Fault (bit 4.13) .............................................................................. 76
Technology Ability Field (bits 4.12:5) ......................................................... 76
Selector Field (Bits 4.4:0) .......................................................................... 77
Register 5: Auto-Negotiation Link Partner Ability Register ........................ 78
Next Page (bit 5.15) ................................................................................... 78
Acknowledge (bit 5.14) .............................................................................. 79
Remote Fault (bit 5.13) .............................................................................. 79
Technology Ability Field (bits 5.12:5) ......................................................... 79
Selector Field (bits 5.4:0) ........................................................................... 79
Register 6: Auto-Negotiation Expansion Register ..................................... 80
IEEE Reserved Bits (bits 6.15:5) ............................................................... 80
Parallel Detection Fault (bit 6.4) ................................................................ 81
Link Partner Next Page Able (bit 6.3) ........................................................ 81
Next Page Able (bit 6.2) ............................................................................ 81
Page Received (bit 6.1) ............................................................................. 81
Link Partner Auto-Negotiation Able (bit 6.0) .............................................. 81
Register 7: Auto-Negotiation Next Page Transmit Register ...................... 82
Next Page (bit 7.15) ................................................................................... 83
IEEE Reserved Bit (bit 7.14) ...................................................................... 83
Message Page (bit 7.13) ........................................................................... 83
Acknowledge 2 (bit 7.12) ........................................................................... 83
Toggle (bit 7.11) ........................................................................................ 83
Message Code Field / Unformatted Code Field (bits 7.10:0) .................... 83
Register 8: Auto-Negotiation Next Page Link Partner Ability Register ...... 84
Next Page (bit 8.15) ................................................................................... 85
IEEE Reserved Bit (bit 8.14) ...................................................................... 85
Message Page (bit 8.13) ........................................................................... 85
Acknowledge 2 (bit 8.12) ........................................................................... 85
Message Code Field / Unformatted Code Field (bits 8.10:0) .................... 85
ICS1892, Rev. D, 2/26/01
© 2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
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February 26, 2001