ICS1892 Datasheet, PDF (127/148 Pages) Integrated Circuit Systems – 10Base-T/100Base-TX Integrated PHYceiver

ICS1892
Chapter 10 DC and AC Operating Conditions
10.5.4 100M MII / 100M Stream Interface: Synchronous Transmit Timing
Table 10-11 lists the significant time periods for the 100M MII / 100M Stream Interface synchronous
transmit timing (which consists of timings of signals on the TXD[3:0], TXEN, TXER, and TXCLK pins).
Figure 10-4 shows the timing diagram for the time periods.
Table 10-11. 100M MII / 100M Stream Interface: Synchronous Transmit Timing
Time
Period
Parameter
Conditions Min. Typ. Max. Units
t1 TXD[3:0], TXEN, TXER Setup to TXCLK Rise
–
15
–
–
ns
t2 TXD[3:0], TXEN, TXER Hold after TXCLK Rise
–
0
–
–
ns
Figure 10-4. 100M MII / 100M Stream Interface Synchronous Transmit Timing Diagram
TXCLK
TXD[3:0]
TXEN
TXER
t1
t2
ICS1892, Rev. D, 2/26/01
© 2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
127
February 26, 2001