ICS1892 Datasheet, PDF (132/148 Pages) Integrated Circuit Systems – 10Base-T/100Base-TX Integrated PHYceiver

ICS1892 Data Sheet
Chapter 10 DC and AC Operating Conditions
10.5.9 10M Media Independent Interface: Receive Latency
Table 10-16 lists the significant time periods for the 10M MII timing (which consists of timings of signals on
the following pins: TP_RX (that is, the MII TP_RXP and TP_RXN pins), RXCLK, and RXD. Figure 10-9
shows the timing diagram for the time periods.
Table 10-16.
Time
Period
Parameter
t1 First Bit of /5/ on TP_RX to /5/D/ on RXD
Conditions Min. Typ. Max. Units
10M MII
– 7.7 9 Bit times
Figure 10-9. 10M MII Receive Latency Timing Diagram
TP_RX*
RXCLK
RXD
5
*Manchester
encoding not
shown.
5
t1
5
D
ICS1892, Rev. D, 2/26/01
© 2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
132
February 26, 2001