ICS1892 Datasheet, PDF (144/148 Pages) Integrated Circuit Systems – 10Base-T/100Base-TX Integrated PHYceiver

ICS1892
Chapter 10 DC and AC Operating Conditions
10.5.21 Auto-Negotiation Fast Link Pulse Timing
Table 10-28 lists the significant time periods for the ICS1892 Auto-Negotiation Fast Link Pulse (which
consists of timings of signals on the TP_TXP and TP_TXN pins). Figure 10-21 shows the timing diagram
for the time periods.
Table 10-28. Auto-Negotiation Fast Link Pulse Timing
Time
Period
Parameter
t1 Clock/Data Pulse Width
t2 Clock Pulse-to-Data Pulse Timing
t3 Clock Pulse-to-Clock Pulse Timing
t4 FLP Burst Width
Conditions Min. Typ. Max. Units
–
– 100 –
ns
–
55.5 62.5 69.5 µs
–
111 125 139 µs
–
–
2
–
ms
t5 FLP Burst to FLP Burst
t6 Number of Clock/Data Pulses in a Burst
–
8 16.8 24
ms
–
17
–
33 pulses
Figure 10-21. Auto-Negotiation Fast Link Pulse Timing Diagram
TP_TXP
Clock
Pulse
t1
t2
Data
Pulse
t1
t3
Clock
Pulse
TP_TXP
FLP Burst
t4
t5
FLP Burst
ICS1892, Rev. D, 2/26/01
© 2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
144
February 26, 2001