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HN29W25611T Datasheet, PDF (6/42 Pages) Hitachi Semiconductor – 256M AND type Flash Memory More than 16,057-sector (271,299,072-bit)
HN29W25611T-50H
Pin Function
CE: CE is used to select the device. The status returns to the standby at the rising edge of CE in the reading
operation. However, the status does not return to the standby at the rising edge of CE in the busy state in
programming and erase operation.
OE: Memory data and status register data can be read, when OE is VIL.
WE: Commands and address are latched at the rising edge of WE.
SC: Programming and reading data is latched at the rising edge of SC.
RES: RES pin must be kept at the VILR (VSS ± 0.2 V) level when VCC is turned on and off. In this way, data
in the memory is protected against unintentional erase and programming. RES must be kept at the VIHR (VCC
± 0.2 V) level during any operations such as programming, erase and read.
CDE: Commands and data are latched when CDE is VIL and address is latched when CDE is VIH.
RDY/Busy: The RDY/Busy indicates the program/erase status of the flash memory. The RDY/Busy signal
is initially at a high impedance state. It turns to a VOL level after the (40H) command in programming
operation or the (B0H) command in erase operation. After the erase or programming operation finishes, the
RDY/Busy signal turns back to the high impedance state.
I/O0 to I/O7: The I/O pins are used to input data, address and command, and are used to output memory data
and status register data.
Mode Selection
Mode
CE OE WE SC RES CDE RDY/Busy*3 I/O0 to I/O7
Deep standby
×*4 ×
×
×
VILR ×
VOH
High-Z
Standby
VIH
×
×
×
VIHR ×
VOH
High-Z
Output disable
VIL
VIH
VIH
×
VIHR ×
VOH
High-Z
Status register read*1
VIL
VIL
VIH
×
VIHR ×
VOH
Status register outputs
Command write*2
VIL
VIH
VIL
VIL
VIHR VIL
VOH
Din
Notes: 1. Default mode after the power on is the status register read mode (refer to status transition). From
I/O0 to I/O7 pins output the status, when CE = VIL and OE = VIL (conventional read operation
condition).
2. Refer to the command definition. Data can be read, programmed and erased after commands are
written in this mode.
3. The RDY/Busy bus should be pulled up to VCC to maintain the VOH level while the RDY/Busy pin
outputs a high impedance.
4. An × means “Don’t care”. The pin level can be set to either VIL or VIH referred to DC characteristics.
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