HN29W25611T Datasheet, PDF (20/42 Pages) Hitachi Semiconductor – 256M AND type Flash Memory More than 16,057-sector (271,299,072-bit)

HN29W25611T-50H
Parameter
Symbol Min Typ Max Unit Test conditions
Notes
SC setup for WE
t _SW
CE hold time for OE
t _COH
SA (2) to CA (2) delay time t_SCD
RDY/Busy setup for SC
t _RS
Time to device busy on read t_DBR
mode
50
—
—
ns
0
—
—
ns
—
—
30
µs
200 —
—
ns
—
—
1
µs
Busy time on reset mode
t _RBSY
—
45
—
µs
Notes: 1. t_DF is a time after which the I/O pins become open.
2. t_WSD (min) is specified as a reference point only for SC, if t_WSD is greater than the specified t_WSD (min)
limit, then access time is controlled exclusively by t_SAC.
20