HN29W25611T Datasheet, PDF (25/42 Pages) Hitachi Semiconductor – 256M AND type Flash Memory More than 16,057-sector (271,299,072-bit)

Serial Read (1) with CA after SC Timing Waveform
HN29W25611T-50H
h cycle*⁵
t_{COH *}1
CE
t_CES
OE
t_CWC
t_CWC
t_OEWS
t_WPH
t_WPH
WE
t_OER
CDE
t_WP
t_WP
t_CDH
t_CDS
t_CDS
SC
t_SCS
t_DS t_DH t_AS t_AH
t_WP
t_OES
t_WSD
t_SCC
t_{SCC *}2
t_AS t_AH
t_OEL
tt_SSAPC^tSPL
t_SAC
t_SH
t_SAC
t_SH
I/O0 to I/O7
t_RP
00H
SA(1)
SA(2)
D0out
D1out
RES
RDY
/Busy
t_DBR
t_{RBSY tRS}
High-Z
t_OEWS
t_CWC
t_WPH
t_OER
t_SW
t_WP
t_SOH
t_WP
t_OES
t_SCC
t_{SCC *}3
t_SAC t_DF
t_AS ^tAH
D(k)out _*2
CA(1)
t_SP
t_AS
t_AH
t_SAC tSPL tSAC
t_SAC
t_OEL
t_SH
t_SH
CA(2)
D(m)out D(m+1)out
t_CPH
t_SOH
t_SAC t_DF
D(m+j)out _*3
t_CEH*⁴
t_WP tCDH
t_CDS
t_DS
t_DH
FFH
Notes: 1. The status returns to the Standby at the rising edge of CE.
2. Output data is not valid after the number of the SC pulse exceeds 2112. (0 ≤ k ≤ 2111)
3. Output data is not valid after the number of the SC pulse exceeds (2112-m). (j ≤ 2111-m, 0 ≤ m ≤ 2111)
4. After any commands are written, the status can return to the standby after the command FFH is input and CE turns to the V_IH level.
5. This interval can be repeated h cycle. (1≤ h ≤ 2048 + 64)
Erase and Status Data Polling Timing Waveform (Sector Erase)
CE
t_CES
t_CEH
OE
t_CWC
t_CWC
t_CWC
t_OEWS
t_WPH
t_WPH
t_WPH
t_OEPS
t_CE
t_OE
t_ASE
WE
CDE
t_{CDS tWP}
t_WP
t_CDS
t_CDH
t_WP
tWP
t_CDS
t_CDH
t_CDH
t_SCHW
SC
t_DH
t_AH
t_AH
t_DH
t_SCS
t_DS
t_AS
t_AS
t_DS
t_DF
I/O0 to I/O7
20H
SA(1)
SA(2)
B0H
IO7 = V_OL
RES
t_RP
RDY
/Busy
High-Z
t_DB
*¹
t_COS
t_RDY
t_CDS
t_DF
IO7 = V_OH
*²
High-Z
Notes: 1. Any commands,including reset command FFH, cannot be input while RDY/Busy outputs a V_OL.
2. The status returns to the standby status after RDY/Busy returns to High-Z.
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