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HN29W25611T Datasheet, PDF (24/42 Pages) Hitachi Semiconductor – 256M AND type Flash Memory More than 16,057-sector (271,299,072-bit)
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HN29W25611T-50H
Serial Read (1) (2) Timing Waveform
CE
tCES
OE
tCWC
tCWC
tOEWS
tWPH
tWPH
tOER
WE
CDE
tCDS tWP
tWP
tCDS
tCDH
tWP
tOES
tWSD
tSCC
tSCC
*2
SC
tSCS
tDS
I/O0 to I/O7
tDH
tAS
tAH
tAS
tAH
tSP
tSPL
tOEL
tSAC tSH
tSAC
tSH
tSAC
00H
/F0H
SA(1)
SA(2)
D0out/D2048out D1out/D2049out
RES
tRP
RDY
/Busy
tDBR
tRBSY
tRS
High-Z
tCOH
*1
tCPH
tSOH
tSAC
tDF
D2111out/D2111out
*2
*3
tCEH
tWP tCDH
tCDS
tDS tDH
FFH
Notes: 1. The status returns to the standby at the rising edge of CE.
2. Output data is not valid after the number of the SC pulse exceeds 2112 and 64 in the serial read mode (1)and (2), respectively.
3. After any commands are written, the status can return to the standby after the command FFH is input and CE turns to the VIH level.
Serial Read (1) with CA before SC Timing Waveform
h-1 cycle *5
CE
tCES
OE
tCWC
tCWC
tCWC
tCWC
tOEWS
tWPH
tWPH
tWPH
tWPH
tOER
WE
tCDS tWP tCDS tWP
tWP
tWP
tWP
CDE
tCDH
tSCD
tWSD
tOES
tSCC
tSCC *2
SC
tSCS
I/O0 to I/O7
tDS tDH
tAS tAH
tAS tAH
tAS tAH
tSP
tAS
tAH
tOEL
tSAC
tSPL
tSH
tSAC
tSH
tSAC
tRP
00H
SA(1)
SA(2)
CA(1)
CA(2)
D(n)out
D(n+1)out
RES
RDY
/Busy
tDBR
tRBSY
tRS
High-Z
tOEWS
tCWC
tWPH
tOER
tSW
tWP
tWP
tSOH
tOES tSCC
tSCC *3
tSAC tDF
tAS tAH
D(n+i)out *2
CA(1)'
tAS
tAH
tSAC
tOEL
tSP tSPL tSAC
tSAC
tSH
tSH
CA(2)'
D(m)out D(m+1)out
tCOH*1
tCPH
tSOH
tSAC tDF
D(m+j)out *3
tCEH*4
tWP tCDH
tCDS
tDS tDH
FFH
Notes: 1. The status returns to the Standby at the rising edge of CE.
2. Output data is not valid after the number of the SC pulse exceeds (2112-n). (i ≤ 2111-n, 0 ≤ n ≤ 2111)
3. Output data is not valid after the number of the SC pulse exceeds (2112-m). (j ≤ 2111-m, 0 ≤ m ≤ 2111)
4. After any commands are written, the status can return to the standby after the command FFH is input and CE turns
to the VIH level.
5. This interval can be repeated (h-1) cycle. (1≤ h ≤ 2048 + 64)
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