900844 Datasheet, PDF (98/118 Pages) Freescale Semiconductor, Inc – Integrated Power Management IC for Ultra-mobile and Embedded Applications

FUNCTIONAL DEVICE OPERATION
GPIOS
ADC STATUS/CONTROL REGISTERS AND BIT DESCRIPTION
Table 70. Extended ADC Control Register Structure and Bits Description
Name
Bits
Description
VPWRCON
FSLADCCNTL (ADDR 0x1DE - R/W - Default Value: 0x00)
0 ^{Enable channel 22 to read the V}PWR ^voltage
x0 = Disable (Default)
x1 = Enable
CHRGICON 1 Enable channel 24 to read the Battery charging current
x0 = Disable (Default)
x1 = Enable
LICON
2 ^{Enable channel 25 to read the Backup Battery voltage}
x0 = Disable (Default)
x1 = Enable
RSVD
LSBSEL
3 ^Reserved
4 ADC LSB Selection Bit
x0 = Refer to Table 59
x1 = Refer to Table 59
RSVD
7:4 ^Reserved
GPIOS
DESCRIPTION
The 900844 has eight GPIOs, and eight GPOs for platform control.
As outputs, the GPIOs support CMOS/OD signaling levels, based on the voltage level on the GPIOVCC. The GPOs support
CMOS signaling levels, based on the voltage level on the GPOVCC pin. As inputs, they are 3.6 V tolerant and are de-bounced
for a period of no more than 10 ms minimum.
The 900844 provides one bank of eight configurable GPIO inputs/outputs, GPIO[7:0] for general purpose sensing and platform
control. Only GPIOs support an input function.
GPIOs switch between a high-impedance (>1.0 MΩ) state and a low-impedance (20 Ω nominal) state when operating in open
drain mode. When operating in CMOS mode, the outputs drive from the voltage supplied on the GPIOVCC pin with a 20 Ω output
drive capability (for GPIOs).
The electrical characteristics of the output buffer will therefore be specified as relative percentages of the driving supply.
Any unused GPIO pin should be tied to ground on the board.
When any GPIO is configured as an open drain, the pull-up voltage cannot exceed that of the GPIOVCC Voltage level.
Table 71 shows the default state of the different GPIOs and their capabilities.
Table 71. GPIOs Capabilities and Default States
GPIO
Input Output CMOS OD Slew CNTL Default Mode Default Level
GPIO0
Yes Yes Yes Yes
No
Input
HI-Z
GPIO1
Yes Yes Yes Yes
No
Input
HI-Z
GPIO2
Yes Yes Yes Yes
No
Input
HI-Z
GPIO3
Yes Yes Yes Yes
No
Input
HI-Z
GPIO4
Yes Yes Yes Yes
No
Input
HI-Z
GPIO5
Yes Yes Yes Yes
No
Input
HI-Z
GPIO6
Yes Yes Yes Yes
No
Input
HI-Z
GPIO7
Yes Yes Yes Yes
No
Input
HI-Z
GPO0
No Yes Yes No
No
CMOS
Low
GPO1
No Yes Yes No
No
CMOS
Low
900844
98
Analog Integrated Circuit Device Data
Freescale Semiconductor