900844 Datasheet, PDF (39/118 Pages) Freescale Semiconductor, Inc – Integrated Power Management IC for Ultra-mobile and Embedded Applications

FUNCTIONAL DEVICE OPERATION
SYSTEM CONTROL INTERFACE
VID
VID (V)
VID
VID (V)
VID
VID (V)
VID
VID (V)
6543210
6543210
6543210
6543210
0 0 0 0 0 0 0 1.2000 0 1 0 0 0 0 0 1.1000 1 0 0 0 0 0 0 0.7000 1 1 0 0 0 0 0 0.3000
0 0 0 0 0 0 1 1.2000 0 1 0 0 0 0 1 1.0875 1 0 0 0 0 0 1 0.6875 1 1 0 0 0 0 1 OFF
0 0 0 0 0 1 0 1.2000 0 1 0 0 0 1 0 1.0750 1 0 0 0 0 1 0 0.6750 1 1 0 0 0 1 0 OFF
0 0 0 0 0 1 1 1.2000 0 1 0 0 0 1 1 1.0625 1 0 0 0 0 1 1 0.6625 1 1 0 0 0 1 1 OFF
0 0 0 0 1 0 0 1.2000 0 1 0 0 1 0 0 1.0500 1 0 0 0 1 0 0 0.6500 1 1 0 0 1 0 0 OFF
0 0 0 0 1 0 1 1.2000 0 1 0 0 1 0 1 1.0375 1 0 0 0 1 0 1 0.6375 1 1 0 0 1 0 1 OFF
0 0 0 0 1 1 0 1.2000 0 1 0 0 1 1 0 1.0250 1 0 0 0 1 1 0 0.6250 1 1 0 0 1 1 0 OFF
0 0 0 0 1 1 1 1.2000 0 1 0 0 1 1 1 1.0125 1 0 0 0 1 1 1 0.6125 1 1 0 0 1 1 1 OFF
0 0 0 1 0 0 0 1.2000 0 1 0 1 0 0 0 1.0000 1 0 0 1 0 0 0 0.6000 1 1 0 1 0 0 0 OFF
0 0 0 1 0 0 1 1.2000 0 1 0 1 0 0 1 0.9875 1 0 0 1 0 0 1 0.5875 1 1 0 1 0 0 1 OFF
0 0 0 1 0 1 0 1.2000 0 1 0 1 0 1 0 0.9750 1 0 0 1 0 1 0 0.5750 1 1 0 1 0 1 0 OFF
0 0 0 1 0 1 1 1.2000 0 1 0 1 0 1 1 0.9625 1 0 0 1 0 1 1 0.5625 1 1 0 1 0 1 1 OFF
0 0 0 1 1 0 0 1.2000 0 1 0 1 1 0 0 0.9500 1 0 0 1 1 0 0 0.5500 1 1 0 1 1 0 0 OFF
0 0 0 1 1 0 1 1.2000 0 1 0 1 1 0 1 0.9375 1 0 0 1 1 0 1 0.5375 1 1 0 1 1 0 1 OFF
0 0 0 1 1 1 0 1.2000 0 1 0 1 1 1 0 0.9250 1 0 0 1 1 1 0 0.5250 1 1 0 1 1 1 0 OFF
0 0 0 1 1 1 1 1.2000 0 1 0 1 1 1 1 0.9125 1 0 0 1 1 1 1 0.5125 1 1 0 1 1 1 1 OFF
0 0 1 0 0 0 0 1.2000 0 1 1 0 0 0 0 0.9000 1 0 1 0 0 0 0 0.5000 1 1 1 0 0 0 0 OFF
0 0 1 0 0 0 1 1.2000 0 1 1 0 0 0 1 0.8875 1 0 1 0 0 0 1 0.4875 1 1 1 0 0 0 1 OFF
0 0 1 0 0 1 0 1.2000 0 1 1 0 0 1 0 0.8750 1 0 1 0 0 1 0 0.4750 1 1 1 0 0 1 0 OFF
0 0 1 0 0 1 1 1.2000 0 1 1 0 0 1 1 0.8625 1 0 1 0 0 1 1 0.4625 1 1 1 0 0 1 1 OFF
0 0 1 0 1 0 0 1.2000 0 1 1 0 1 0 0 0.8500 1 0 1 0 1 0 0 0.4500 1 1 1 0 1 0 0 OFF
0 0 1 0 1 0 1 1.2000 0 1 1 0 1 0 1 0.8375 1 0 1 0 1 0 1 0.4375 1 1 1 0 1 0 1 OFF
0 0 1 0 1 1 0 1.2000 0 1 1 0 1 1 0 0.8250 1 0 1 0 1 1 0 0.4250 1 1 1 0 1 1 0 OFF
0 0 1 0 1 1 1 1.2000 0 1 1 0 1 1 1 0.8125 1 0 1 0 1 1 1 0.4125 1 1 1 0 1 1 1 OFF
0 0 1 1 0 0 0 1.2000 0 1 1 1 0 0 0 0.8000 1 0 1 1 0 0 0 0.4000 1 1 1 1 0 0 0 OFF
0 0 1 1 0 0 1 1.1875 0 1 1 1 0 0 1 0.7875 1 0 1 1 0 0 1 0.3875 1 1 1 1 0 0 1 OFF
0 0 1 1 0 1 0 1.1750 0 1 1 1 0 1 0 0.7750 1 0 1 1 0 1 0 0.3750 1 1 1 1 0 1 0 OFF
0 0 1 1 0 1 1 1.1625 0 1 1 1 0 1 1 0.7625 1 0 1 1 0 1 1 0.3625 1 1 1 1 0 1 1 OFF
0 0 1 1 1 0 0 1.1500 0 1 1 1 1 0 0 0.7500 1 0 1 1 1 0 0 0.3500 1 1 1 1 1 0 0 OFF
0 0 1 1 1 0 1 1.1375 0 1 1 1 1 0 1 0.7375 1 0 1 1 1 0 1 0.3375 1 1 1 1 1 0 1 OFF
0 0 1 1 1 1 0 1.1250 0 1 1 1 1 1 0 0.7250 1 0 1 1 1 1 0 0.3250 1 1 1 1 1 1 0 OFF
0 0 1 1 1 1 1 1.1125 0 1 1 1 1 1 1 0.7125 1 0 1 1 1 1 1 0.3125 1 1 1 1 1 1 1 OFF
Figure 15. 7-Bit VID Code vs. VCC/VNN Output Voltage
As explained previously, the output voltage setting for the VCC and VNN regulators can be set via the VID/VIDEN pins from
the CPU, or by programming the VNNLATCH and VCCLATCH registers through the SPI interface via the platform controller hub.
Figure 16 shows the relationship between the VID/VIDEN signals, the DVPxVRD bit in the Latch registers, and the VRCOMP
output signal. The figure shows V_CC as an example, but is also applicable to V_NN
The DVPxVRD bit in the VNNLATCH and VCCLATCH registers controls the select input to the multiplexer. If the DVPxVRD
bit is set to a '0', the regulator uses the VID/VIDEN pins from the CPU, and if the DVPxVRD bit is set to a '1', the regulator uses
the VNNLATCH and VCCLATCH registers to set the output voltage.
When the DVPxVRD bit is set to a '0', any changes to the VNNLATCH and VCCLATCH registers should be ignored. When
the DVPxVRD bit is set to a '1', any changes on the VID/VIDEN pins from the CPU should be ignored.
As soon as the DVPxVRD bit is set to a '1', the regulator switches from using the VID/VIDEN pins to using the VCCLATCH
register, and the output voltage of the regulator changes to what the VCCLATCH register is set.
Figure 16 shows how the PMIC controls the VRCOMP signal. The PMIC toggles the VRCOMP signal any time the DVPxVRD
bit is set to a '1' and the output voltage of the V_NN or the V_CC regulator changes. If the output voltage of the V_CC/V_NN regulator
changes and the DVPxVRD bit is set to a '0', the VRCOMP signal should not toggle. VRCOMP only toggles for changes to V_CC
and V_NN through the SPI registers.
Analog Integrated Circuit Device Data
Freescale Semiconductor
900844
39