MC9S08SH32CWL Datasheet, PDF (85/328 Pages) Freescale Semiconductor, Inc – MC9S08SH32 Series Features

6.6.1.8
Chapter 6 Parallel Input/Output Control
Port A Interrupt Edge Select Register (PTAES)
7
R
0
W
Reset:
0
6
5
4
3
2
0
0
0
PTAES3
PTAES2
0
0
0
0
0
Figure 6-10. Port A Edge Select Register (PTAES)
Table 6-9. PTAES Register Field Descriptions
1
PTAES1
0
0
PTAES0
0
Field
Description
3:0
PTAES[3:0]
Port A Edge Selects — Each of the PTAESn bits serves a dual purpose by selecting the polarity of the active
interrupt edge as well as selecting a pull-up or pull-down device if enabled.
0 A pull-up device is connected to the associated pin and detects falling edge/low level for interrupt generation.
1 A pull-down device is connected to the associated pin and detects rising edge/high level for interrupt
generation.
MC9S08SH32 Series Data Sheet, Rev. 2
Freescale Semiconductor
85
PRELIMINARY