MC9S08SH32CWL Datasheet, PDF (64/328 Pages) Freescale Semiconductor, Inc – MC9S08SH32 Series Features

Chapter 5 Resets, Interrupts, and General System Control
When an interrupt condition occurs, an associated flag bit becomes set. If the associated local interrupt
enable is 1, an interrupt request is sent to the CPU. Within the CPU, if the global interrupt mask (I bit in
the CCR) is 0, the CPU will finish the current instruction; stack the PCL, PCH, X, A, and CCR CPU
registers; set the I bit; and then fetch the interrupt vector for the highest priority pending interrupt.
Processing then continues in the interrupt service routine.
Table 5-2. Vector Summary
Vector
Priority
Lowest
Vector
Number
31
30
29
28
27
26
25
24
23
22
21
20
19
18
Address
(High/Low)
0xFFC0/0xFFC1
0xFFC2/0xFFC3
0xFFC4/0xFFC5
0xFFC6/0xFFC7
0xFFC8/0xFFC9
0xFFCA/0xFFCB
0xFFCC/0xFFCD
0xFFCE/0xFFCF
0xFFD0/0xFFD1
0xFFD2/0xFFD3
0xFFD4/0xFFD5
0xFFD6/0xFFD7
0xFFD8/0xFFD9
0xFFDA/0xFFDB
Vector
Name
—
Vacmp
—
—
—
Vmtim
Vrtc
Viic
Vadc
—
Vportb
Vporta
—
Vscitx
Module
—
ACMP
—
—
—
MTIM
RTC
IIC
ADC
—
Port B
Port A
—
SCI
17
0xFFDC/0xFFDD Vscirx
SCI
16 0xFFDE/0xFFDF Vscierr
SCI
15 0xFFE0/0xFFE1 Vspi
SPI
14 0xFFE2/0xFFE3 Vtpm2ovf TPM2
13 0xFFE4/0xFFE5 Vtpm2ch1 TPM2
12 0xFFE6/0xFFE7 Vtpm2ch0 TPM2
11 0xFFE8/0xFFE9 Vtpm1ovf TPM1
10 0xFFEA/0xFFEB
—
—
9
0xFFEC/0xFFED
—
—
8
0xFFEE/0xFFEF
—
—
7
0xFFF0/0xFFF1
—
—
6
0xFFF2/0xFFF3 Vtpm1ch1 TPM1
5
0xFFF4/0xFFF5 Vtpm1ch0 TPM1
4
0xFFF6/0xFFF7
—
—
3
0xFFF8/0xFFF9 Vlvd
System
control
2
0xFFFA/0xFFFB Virq
IRQ
1
0xFFFC/0xFFFD Vswi
Core
0
0xFFFE/0xFFFF Vreset
System
control
Highest
Source
—
ACF
—
—
—
TOF
RTIF
IICIS
COCO
—
PTBIF
PTAIF
—
TDRE, TC
IDLE, RDRF,
LDBKDIF,
RXEDGIF
OR, NF,
FE, PF
SPIF, MODF,
SPTEF
TOF
CH1F
CH0F
TOF
—
—
—
—
CH1F
CH0F
—
LVWF
IRQF
SWI Instruction
COP,
LVD,
RESET pin,
Illegal opcode,
Illegal address
Enable
Description
—
ACIE
—
—
—
TOIE
RTIE
IICIE
AIEN
—
PTBIE
PTAIE
—
TIE, TCIE
ILIE, RIE,
LBKDIE,
RXEDGIE
ORIE, NFIE,
FEIE, PFIE
—
Analog comparator
—
—
—
MTIM overflow
Real-time interrupt
IIC control
ADC
—
Port B Pins
Port A Pins
—
SCI transmit
SCI receive
SCI error
SPIE, SPIE, SPTIE
SPI
TOIE
CH1IE
CH0IE
TOIE
—
—
—
—
CH1IE
CH0IE
—
TPM2 overflow
TPM2 channel 1
TPM2 channel 0
TPM1 overflow
—
—
—
—
TPM1 channel 1
TPM1 channel 0
—
LVWIE
Low-voltage warning
IRQIE
—
COPE
LVDRE
—
—
—
IRQ pin
Software interrupt
Watchdog timer
Low-voltage detect
External pin
Illegal opcode
Illegal address
MC9S08SH32 Series Data Sheet, Rev. 2
64
Freescale Semiconductor
PRELIMINARY