MC9S08SH32CWL Datasheet, PDF (172/328 Pages) Freescale Semiconductor, Inc – MC9S08SH32 Series Features

Chapter 11 Internal Clock Source (S08ICSV2)
Optional
External Reference
Clock Source
Block
RANGE
HGO
EREFS
EREFSTEN
IREFSTEN
ERCLKEN
IRCLKEN
CLKS
BDIV
ICSERCLK
ICSIRCLK
IREFS
/ 2ⁿ
n=0-7
RDIV
Internal
Reference
Clock
9
TRIM
RDIV_CLK
LP
DCO
/ 2ⁿ
n=0-3
DCOOUT
/2
9
Filter
FLL
Internal Clock Source Block
ICSOUT
ICSLCLK
ICSFFCLK
Figure 11-2. Internal Clock Source (ICS) Block Diagram
11.1.4 Modes of Operation
There are seven modes of operation for the ICS: FEI, FEE, FBI, FBILP, FBE, FBELP, and stop.
11.1.4.1 FLL Engaged Internal (FEI)
In FLL engaged internal mode, which is the default mode, the ICS supplies a clock derived from the FLL
which is controlled by the internal reference clock. The BDC clock is supplied from the FLL.
11.1.4.2 FLL Engaged External (FEE)
In FLL engaged external mode, the ICS supplies a clock derived from the FLL which is controlled by an
external reference clock. The BDC clock is supplied from the FLL.
11.1.4.3 FLL Bypassed Internal (FBI)
In FLL bypassed internal mode, the FLL is enabled and controlled by the internal reference clock, but is
bypassed. The ICS supplies a clock derived from the internal reference clock. The BDC clock is supplied
from the FLL.
MC9S08SH32 Series Data Sheet, Rev. 2
172
Freescale Semiconductor
PRELIMINARY