MC9S08SH32CWL Datasheet, PDF (72/328 Pages) Freescale Semiconductor, Inc – MC9S08SH32 Series Features

Chapter 5 Resets, Interrupts, and General System Control
5.7.7 System Power Management Status and Control 1 Register
(SPMSC1)
This high page register contains status and control bits to support the low voltage detect function, and to
enable the bandgap voltage reference for use by the ADC module. This register should be written during
the user’s reset initialization program to set the desired controls even if the desired settings are the same
as the reset settings.
7
6
5
4
3
2
1
0
R LVWF¹
0
0
LVWIE
LVDRE²
LVDSE²
LVDE²
BGBE
W
LVWACK
Reset:
0
0
0
1
1
1
0
0
= Unimplemented or Reserved
1 _{LVWF will be set in the case when VSupply transitions below the trip point or after reset and VSupply is already below VLVW}
2 _{This bit can be written only one time after reset. Additional writes are ignored.}
Figure 5-9. System Power Management Status and Control 1 Register (SPMSC1)
Table 5-10. SPMSC1 Register Field Descriptions
Field
Description
7
LVWF
6
LVWACK
5
LVWIE
4
LVDRE
3
LVDSE
2
LVDE
0
BGBE
Low-Voltage Warning Flag — The LVWF bit indicates the low voltage warning status.
0 Low voltage warning is not present.
1 Low voltage warning is present or was present.
Low-Voltage Warning Acknowledge — The LVWF bit indicates the low voltage warning status.Writing a 1 to
LVWACK clears LVWF to a 0 if a low voltage warning is not present.
Low-Voltage Warning Interrupt Enable — This bit enables hardware interrupt requests for LVWF.
0 Hardware interrupt disabled (use polling).
1 Request a hardware interrupt when LVWF = 1.
Low-Voltage Detect Reset Enable — This write-once bit enables LVD events to generate a hardware reset
(provided LVDE = 1).
0 LVD events do not generate hardware resets.
1 Force an MCU reset when an enabled low-voltage detect event occurs.
Low-Voltage Detect Stop Enable — Provided LVDE = 1, this write-once bit determines whether the low-voltage
detect function operates when the MCU is in stop mode.
0 Low-voltage detect disabled during stop mode.
1 Low-voltage detect enabled during stop mode.
Low-Voltage Detect Enable — This write-once bit enables low-voltage detect logic and qualifies the operation
of other bits in this register.
0 LVD logic disabled.
1 LVD logic enabled.
Bandgap Buffer Enable — This bit enables an internal buffer for the bandgap voltage reference for use by the
ADC and ACMP modules.
0 Bandgap buffer disabled.
1 Bandgap buffer enabled.
MC9S08SH32 Series Data Sheet, Rev. 2
72
Freescale Semiconductor
PRELIMINARY