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MC9S08SH32CWL Datasheet, PDF (35/328 Pages) Freescale Semiconductor, Inc – MC9S08SH32 Series Features
Chapter 3 Modes of Operation
Table 3-2. Stop Mode Behavior
Peripheral
Stop2
Mode
Stop3
CPU
Off
Standby
RAM
Standby
Standby
FLASH
Off
Standby
Parallel Port Registers
ADC
ACMP
BDM
ICS
Off
Standby
Off
Optionally On1
Off
Optionally On2
Off3
Optionally On
Off
Optionally On4
IIC
LVD/LVW
Off
Standby
Off5
Optionally On
MTIM
Off
Standby
RTC
Optionally On
Optionally On
SCI
Off
Standby
SPI
Off
Standby
TPM
Voltage Regulator
XOSC
Off
Standby
Off
Standby
Optionally On6
Optionally On7
I/O Pins
States Held
States Held
1 Requires the asynchronous ADC clock and LVD to be enabled, else in
standby.
2 Requires the LVD to be enabled when compare to internal bandgap reference
option is enabled.
3 If ENBDM is set when entering stop2, the MCU will actually enter stop3.
4 IRCLKEN and IREFSTEN set in ICSC1, else in standby.
5 If LVDSE is set when entering stop2, the MCU will actually enter stop3.
6 Voltage regulator will be on if BDM is enabled or if LVD is enabled when
entering stop3.
7 ERCLKEN and EREFSTEN set in ICSC2, else in standby. For high frequency
range (RANGE in ICSC2 set) requires the LVD to also be enabled in stop3.
MC9S08SH32 Series Data Sheet, Rev. 2
Freescale Semiconductor
35
PRELIMINARY