MC9S08SH32CWL Datasheet, PDF (153/328 Pages) Freescale Semiconductor, Inc – MC9S08SH32 Series Features

Chapter 10 Inter-Integrated Circuit (S08IICV2)
Refer to the direct-page register summary in the memory chapter of this document for the absolute address
assignments for all IIC registers. This section refers to registers and control bits only by their names. A
Freescale-provided equate or header file is used to translate these names into the appropriate absolute
addresses.
10.3.1 IIC Address Register (IICA)
7
6
5
4
3
2
1
0
R
0
AD7
AD6
AD5
AD4
AD3
AD2
AD1
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 10-3. IIC Address Register (IICA)
Table 10-2. IICA Field Descriptions
Field
7–1
AD[7:1]
Description
Slave Address. The AD[7:1] field contains the slave address to be used by the IIC module. This field is used on
the 7-bit address scheme and the lower seven bits of the 10-bit address scheme.
10.3.2 IIC Frequency Divider Register (IICF)
7
6
5
4
3
2
1
0
R
MULT
ICR
W
Reset
0
0
0
0
0
0
0
0
Figure 10-4. IIC Frequency Divider Register (IICF)
MC9S08SH32 Series Data Sheet, Rev. 2
Freescale Semiconductor
153
PRELIMINARY