MCF5272CVM66 Datasheet, PDF (81/544 Pages) Freescale Semiconductor, Inc – MCF5272 ColdFire® Integrated Microprocessor

ColdFire Core
2.6 Instruction Set Summary
The ColdFire instruction set is a simplified version of the M68000 instruction set. The removed
instructions include BCD, bit field, logical rotate, decrement and branch, and integer multiply with a 64-bit
result. Nine new MAC instructions have been added.
Table 2-6 lists notational conventions used throughout this manual.
Instruction
cc
An
Ay,Ax
Dn
Dy,Dx
Rc
Rm
Rn
Rw
Ry,Rx
Xi
ACC
CCR
MACSR
MASK
PC
SR
DDATA
PST
#<data>
<ea>
Table 2-6. Notational Conventions
Operand Syntax
Opcode Wildcard
Logical condition (example: NE for not equal)
Register Specifications
Any address register n (example: A3 is address register 3)
Source and destination address registers, respectively
Any data register n (example: D5 is data register 5)
Source and destination data registers, respectively
Any control register (example VBR is the vector base register)
MAC registers (ACC, MAC, MASK)
Any address or data register
Destination register w (used for MAC instructions only)
Any source and destination registers, respectively
index register i (can be an address or data register: Ai, Di)
Register Names
MAC accumulator register
Condition code register (lower byte of SR)
MAC status register
MAC mask register
Program counter
Status register
Port Names
Debug data port
Processor status port
Miscellaneous Operands
Immediate data following the 16-bit operation word of the instruction
Effective address
MCF5272 ColdFire^® Integrated Microprocessor User’s Manual, Rev. 3
Freescale Semiconductor
2-13