MCF5272CVM66 Datasheet, PDF (405/544 Pages) Freescale Semiconductor, Inc – MCF5272 ColdFire® Integrated Microprocessor

General Purpose I/O Module
17.3.3 Port C Data Direction Register (PCDDR)
The PCDDR determines the signal direction of each parallel port pin programmed as a GPIO port in the
PCCNT.
15
0
Field
PCDDR
Reset
0000_0000_0000_0000
R/W
Read/Write
Addr
MBAR + 0x0094
Figure 17-6. Port C Data Direction Register (PCDDR)
17.4 Port Data Registers
These 16-bit bidirectional registers are used to read or write the logic states of the GPIO lines. This register
has no effect on pins not configured for general-purpose I/O.
After a system reset, these register bits are all cleared. When any port lines are configured as outputs, a
logic zero appears on those pins, unless the data register is written with an initial data value prior to setting
the pin direction.
The reset values given in the following register diagrams are the port output values written to the registers
during reset, and do not reflect the value of a register read cycle. Register reads always return the
instantaneous value of the corresponding pins.
17.4.1 Port Data Register (PxDAT)
In the following description PxDAT refers to PADAT, PBDAT, or PCDAT.
The PxDAT value for inputs corresponds to the logic level at the pin; for outputs, the value corresponds to
the logic level driven onto the pin. Note that PxDAT has no effect on pins which have not been configured
for GPIO.
15
0
Field
PxDAT
Reset
Undefined
R/W
Read/Write
Addr
MBAR + 0x0086 (PADAT); 0x008E (PBDAT); 0x0096 (PCDAT)
Figure 17-7. Port x Data Register (PADAT, PBDAT, and PCDAT)
MCF5272 ColdFire^® Integrated Microprocessor User’s Manual, Rev. 3
Freescale Semiconductor
17-11