MCF5272CVM66 Datasheet, PDF (59/544 Pages) Freescale Semiconductor, Inc – MCF5272 ColdFire® Integrated Microprocessor

Table xvi. USB Module Memory Map (continued)
MBAR
Offset
Register Name
0x1092 USB Endpoint 1 Interrupt Mask Register
0x1096 USB Endpoint 2 Interrupt Mask Register
0x109A USB Endpoint 3 Interrupt Mask Register
0x109E USB Endpoint 4 Interrupt Mask Register
0x10A2 USB Endpoint 5 Interrupt Mask Register
0x10A6 USB Endpoint 6 Interrupt Mask Register
0x10AA USB Endpoint 7 Interrupt Mask Register
0x10AC USB Endpoint 0 Data Register
0x10B0 USB Endpoint 1 Data Register
0x10B4 USB Endpoint 2 Data Register
0x10B8 USB Endpoint 3 Data Register
0x10BC USB Endpoint 4 Data Register
0x10C0 USB Endpoint 5 Data Register
0x10C4 USB Endpoint 6 Data Register
0x10C8 USB Endpoint 7 Data Register
0x10CE USB Endpoint 0 Data Present Register
0x10D2 USB Endpoint 1 Data Present Register
0x10D6 USB Endpoint 2 Data Present Register
0x10DA USB Endpoint 3 Data Present Register
0x10DE USB Endpoint 4 Data Present Register
0x10E2 USB Endpoint 5 Data Present Register
0x10E6 USB Endpoint 6 Data Present Register
0x10EA USB Endpoint 7 Data Present Register
0x1400– USB Configuration RAM, 1 K Bytes
0x17FF
Old Mnemonic
USBEPIMR1
USBEPIMR2
USBEPIMR3
USBEPIMR4
USBEPIMR5
USBEPIMR6
USBEPIMR7
USBEPDAT0
USBEPDAT1
USBEPDAT2
USBEPDAT3
USBEPDAT4
USBEPDAT5
USBEPDAT6
USBEPDAT7
USBEPDP0
USBEPDP1
USBEPDP2
USBEPDP3
USBEPDP4
USBEPDP5
USBEPDP6
USBEPDP7
USB_CFG_RAM
New Mnemonic
EP1IMR
EP2IMR
EP3IMR
EP4IMR
EP5IMR
EP6IMR
EP7IMR
EP0DR
EP1DR
EP2DR
EP3DR
EP4DR
EP5DR
EP6DR
EP7DR
EP0DPR
EP1DPR
EP2DPR
EP3DPR
EP4DPR
EP5DPR
EP6DPR
EP7DPR
No change
NOTE
The MBAR Offset column corresponds to the tables found in Appendix A,
“List of Memory Maps.” 16- and/or 8-bit wide registers may be offset by 0,
1, 2, or 3 bytes from the offset address shown above. Refer to the
appropriate discussions in this document for actual positioning of 16- or
8-bit registers in a 32-bit long word.
MCF5272 ColdFire^® Integrated Microprocessor User’s Manual, Rev. 3
Freescale Semiconductor
lix