MCF5272CVM66 Datasheet, PDF (412/544 Pages) Freescale Semiconductor, Inc – MCF5272 ColdFire® Integrated Microprocessor

Signal Descriptions
TDO/DSO
TMS/BKPT
TRST/DSCLK
TCK/PSTCLK
TDI/DSI
MTMOD
DDATA[3:0]
PST[3:0]
E_TxD0
E_TxEN
E_TxCLK
E_COL
E_RxDV
E_RxD0
E_RxCLK
E_TxER
E_CRS
PB8/E_TxD3
PB9/E_TxD2
PB10/E_TxD1
PB11/E_RxD3
PB12/E_RxD2
PB13/E_RxD1
PB14/E_RxER
PB15/E_MDC
E_MDIO
PA[15:0]
PB[15:0]
PC[15:0]
PB0/URT0_TXD
PB1/URT0_RXD
PB2/URT0_CTS
PB3/URT0_RTS
PB4/URT0_CLK
QSPI_Dout/WSEL
QSPI_Din
QSPI_CLK/BUSW1
QSPI_CS0/BUSW0
PA11/QSPI_CS1
PA7/QSPI_CS3/DOUT3
URT1_CTS/QSPI_CS2
INT[6:1]
CLKIN
HiZ
BYPASS
DRESETEN
RSTO RSTI
JTAG
and
BDM
EXT
INTERRUPTS
ROM
RAM ^INSTRUCTION
16 KBYTES 4 KBYTES ^{CACHE RAM}
1 KBYTE
KBUS
K
TO
M
M BUS
SWITCH/
ARB
EXTERNAL
BUS
INTERFACE
FAST
ETHERNET
CONTROLLER
GPIO
V2 ColdFire
CPU
and MAC/DIV
MBUS
PLIC
PORT 0
UART1
UART0
QSPI
USB
PLIC
PORTS 1, 2,
and 3
SBUS
PWM
TIMER/PIT
WATCHDOG
A[22:0]/SDA[13:0]
D[31:0]/(D[31:16]/PC15:0)
CS[6:0]
R/W
BS[3:0]
OE/RD
PB5/TA
TEA
SDCS/CS7
RAS0
CAS0
SDCKE
SDCLK
SDBA[1:0]
SDWE
A10_PRECHG
DOUT0/URT1_TxD
DIN0/URT1_RxD
PA10_DREQ0
PA9/DGNT0
DCL0/URT1_CLK
PA8/FSC0/FSR0
URT1_RTS/INT5
URT1_CTS/QSPI_CS2
DOUT1
DIN1
PA14/DREQ1
PA15_INT6/DGNT1_INT6
DCL1/GDCL1_OUT
FSC1/FSR1/DFSC1
PA12/DFSC2
PA13/DFSC3
PA7/QSPI_CS3/DOUT3
DIN3/INT4
PWM_OUT0
PWM_OUT1/TOUT1
PWM_OUT2/TIN1
NOTE: GPIO pins shown above are multiplexed with most other signals.
Figure 19-1. MCF5272 Block Diagram with Signal Interfaces
19-2
MCF5272 ColdFire^® Integrated Microprocessor User’s Manual, Rev. 3
Freescale Semiconductor