MC9S12DP256B Datasheet, PDF (59/126 Pages) Freescale Semiconductor, Inc – device made up of standard HCS12 blocks and the HCS12 processor core

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2.3.8 PAD[14:08] / AN[14:08] — Port AD Input Pins of ATD1
PAD14 - PAD08 are general purpose input pins and analog inputs AN[6:0] of the analog to digital
converter ATD1.
2.3.9 PAD7 / AN07 / ETRIG0 — Port AD Input Pin of ATD0
PAD7 is a general purpose input pin and analog input AN7 of the analog to digital converter ATD0. It can
act as an external trigger input for the ATD0.
2.3.10 PAD[06:00] / AN[06:00] — Port AD Input Pins of ATD0
PAD06 - PAD00 are general purpose input pins and analog inputs AN[6:0] of the analog to digital
converter ATD0.
2.3.11 PA[7:0] / ADDR[15:8] / DATA[15:8] — Port A I/O Pins
PA7-PA0 are general purpose input or output pins. In MCU expanded modes of operation, these pins are
used for the multiplexed external address and data bus.
2.3.12 PB[7:0] / ADDR[7:0] / DATA[7:0] — Port B I/O Pins
PB7-PB0 are general purpose input or output pins. In MCU expanded modes of operation, these pins are
used for the multiplexed external address and data bus.
2.3.13 PE7 / NOACC / XCLKS — Port E I/O Pin 7
PE7 is a general purpose input or output pin. During MCU expanded modes of operation, the NOACC
signal, when enabled, is used to indicate that the current bus cycle is an unused or “free” cycle. This signal
will assert when the CPU is not using the bus.
The XCLKS input selects between an external clock or oscillator configuration. The state of this pin is
latched at the rising edge of RESET. If the input is a logic low the EXTAL pin is configured for an external
clock drive. If input is a logic high an oscillator circuit is configured on EXTAL and XTAL. Since this pin
is an input with a pull-up device, if the pin is left floating, the default configuration is an oscillator circuit
on EXTAL and XTAL.
2.3.14 PE6 / MODB / IPIPE1 — Port E I/O Pin 6
PE6 is a general purpose input or output pin. It is used as a MCU operating mode select pin during reset.
The state of this pin is latched to the MODB bit at the rising edge of RESET. This pin is shared with the
instruction queue tracking signal IPIPE1. This pin is an input with a pull-down device which is only active
when RESET is low.
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