MC9S12DP256B Datasheet, PDF (24/126 Pages) Freescale Semiconductor, Inc – device made up of standard HCS12 blocks and the HCS12 processor core

MC9S12DP256B Device User G^Fui^rd^ee^e—^scV0^a2.^l1^e5 ^{Semiconductor, Inc.}
1.6 Detailed Register Map
The following tables show the detailed register map of the MC9S12DP256B.
$0000 - $000F
MEBI map 1 of 3 (Core User Guide)
Address
$0000
$0001
$0002
$0003
$0004
$0005
$0006
$0007
$0008
$0009
$000A
$000B
$000C
$000D
$000E
$000F
Name
PORTA
PORTB
DDRA
DDRB
Reserved
Reserved
Reserved
Reserved
PORTE
DDRE
PEAR
MODE
PUCR
RDRIV
EBICTL
Reserved
Bit 7
Read: _{Bit 7}
Write:
Read:
Write: ^{Bit 7}
Read:
Write:
Bit 7
Read:
Write:
Bit 7
Read: 0
Write:
Read: 0
Write:
Read: 0
Write:
Read: 0
Write:
Read:
Write:
Bit 7
Read:
Write:
Bit 7
Read:
Write: ^NOACCE
Read:
Write:
MODC
Read:
Write:
PUPKE
Read:
Write: ^RDPK
Read: 0
Write:
Read: 0
Write:
Bit 6
6
6
6
6
0
0
0
0
6
6
0
MODB
0
0
0
0
Bit 5
5
5
5
5
0
0
0
0
5
5
PIPOE
MODA
0
0
0
0
Bit 4
4
4
4
4
0
0
0
0
Bit 3
3
3
3
3
0
0
0
0
4
3
4
3
NECLK
0
PUPEE
RDPE
0
LSTRE
IVIS
0
0
0
0
0
Bit 2
2
2
2
2
0
0
0
0
2
Bit 2
RDWE
0
0
0
0
0
Bit 1
1
1
1
1
0
0
0
0
Bit 1
0
0
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
0
0
0
0
Bit 0
0
0
EMK
EME
PUPBE PUPAE
RDPB
0
0
RDPA
ESTR
0
$0010 - $0014
MMC map 1 of 4 (Core User Guide)
Address
Name
Bit 7
Bit 6
$0010
INITRM
Read:
Write:
RAM15
RAM14
$0011
is
reset^Ii^Nnto^ITn^Rorm^Gal
Read:
expan_Wde_rd_itw_ei_:de
or
0
narrow
mode^R. ^EG14
Bit 5
RAM13
REG13
Bit 4
RAM12
REG12
Bit 3
RAM11
REG11
Bit 2
0
0
Bit 1
0
0
Bit 0
RAMHAL
0
24
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