MC9S12DP256B Datasheet, PDF (27/126 Pages) Freescale Semiconductor, Inc – device made up of standard HCS12 blocks and the HCS12 processor core

Freescale Semicon_Md_Cu₉c_S1t₂o_Dr_P,₂I₅n_6Bc_D._{evice User Guide — V02.15}
$0030 - $0031
MMC map 4 of 4 (Core User Guide)
Address
$0030
$0031
Name
PPAGE
Reserved
Read:
Write:
Read:
Write:
Bit 7
0
0
Bit 6
0
0
Bit 5
PIX5
0
Bit 4
PIX4
0
Bit 3
PIX3
0
Bit 2
PIX2
0
Bit 1
PIX1
0
Bit 0
PIX0
0
$0032 - $0033
MEBI map 3 of 3 (Core User Guide)
Address
$0032
$0033
Name
PORTK
DDRK
Read:
Write:
Read:
Write:
Bit 7
Bit 7
Bit 7
Bit 6
6
6
Bit 5
5
5
Bit 4
4
4
Bit 3
3
3
Bit 2
2
2
Bit 1
1
1
Bit 0
Bit 0
Bit 0
$0034 - $003F
CRG (Clock and Reset Generator)
Address
$0034
$0035
$0036
$0037
$0038
$0039
$003A
$003B
$003C
$003D
$003E
$003F
Name
SYNR
REFDV
CTFLG
TEST ONLY
CRGFLG
CRGINT
CLKSEL
PLLCTL
RTICTL
COPCTL
FORBYP
TEST ONLY
CTCTL
TEST ONLY
ARMCOP
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Bit 7
0
0
TOUT7
RTIF
RTIE
PLLSEL
CME
0
WCOP
RTIBYP
TCTL7
0
Bit 7
Bit 6
0
0
TOUT6
PROF
0
PSTP
PLLON
RTR6
RSBCK
COPBYP
TCTL6
0
6
Bit 5
SYN5
0
TOUT5
0
0
SYSWAI
AUTO
RTR5
0
0
TCTL5
0
5
Bit 4
SYN4
0
TOUT4
LOCKIF
LOCKIE
ROAWAI
ACQ
RTR4
0
PLLBYP
TCTL4
0
4
Bit 3
SYN3
REFDV3
TOUT3
LOCK
0
PLLWAI
0
RTR3
0
0
TCLT3
0
3
Bit 2
SYN2
REFDV2
TOUT2
TRACK
0
CWAI
PRE
RTR2
CR2
0
TCTL2
0
2
Bit 1
SYN1
REFDV1
TOUT1
SCMIF
SCMIE
RTIWAI
PCE
RTR1
CR1
FCM
TCTL1
0
1
Bit 0
SYN0
REFDV0
TOUT0
SCM
0
COPWAI
SCME
RTR0
CR0
0
TCTL0
0
Bit 0
27
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