MC9S12DP256B Datasheet, PDF(56/126 Page) Freescale Semiconductor, Inc – device made up of standard HCS12 blocks and the HCS12 processor core

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MC9S12DP256B Datasheet, PDF (56/126 Pages) Freescale Semiconductor, Inc – device made up of standard HCS12 blocks and the HCS12 processor core

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MC9S12DP256B Device User GFuirdeeeâscV0a2.l1e5 Semiconductor, Inc.

Pin Name

Funct. 1

PH5

Pin Name

Funct. 2

KWH5

Pin Name Pin Name Pin Name Power

Funct. 3 Funct. 4 Funct. 5 Supply

MOSI2

VDDR

Internal Pull

Resistor

CTRL

Reset

State

PERH/

PPSH Disabled

Description

Port H I/O, Interrupt, MOSI of SPI2

PH4

KWH4

MISO2

PH3

KWH3

SS1

PH2

KWH2

SCK1

PH1

KWH1

MOSI1

PH0

KWH0

MISO1

PERH/

VDDR PPSH Disabled Port H I/O, Interrupt, MISO of SPI2

PERH/

VDDR PPSH Disabled Port H I/O, Interrupt, SS of SPI1

PERH/

VDDR PPSH Disabled Port H I/O, Interrupt, SCK of SPI1

PERH/

VDDR PPSH Disabled Port H I/O, Interrupt, MOSI of SPI1

PERH/

VDDR PPSH Disabled Port H I/O, Interrupt, MISO of SPI1

PERJ/

Port J I/O, Interrupt, TX of CAN4,

PJ7

KWJ7

TXCAN4

SCL

TXCAN0 VDDX PPSJ

SCL of IIC, TX of CAN0

PJ6

KWJ6

RXCAN4

PJ[1:0] KWJ[1:0]

SDA

RXCAN0

VDDX

PERJ/

PPSJ

PERJ/

PSJ

Port J I/O, Interrupt, RX of CAN4,

SDA of IIC, RX of CAN0

Up Port J I/O, Interrupts

PK7

ECS

ROMONE

Port K I/O, Emulation Chip Select,

VDDX PUCR

ROM On Enable

PK[5:0]

XADDR

[19:14]

VDDX PUCR

Up Port K I/O, Extended Addresses

PM7

TXCAN3 TXCAN4

PERM/

Port M I/O, TX of CAN3, TX of

VDDX

PPSM

Disabled

CAN4

PM6

RXCAN3 RXCAN4

PERM/

Port M I/O, RX of CAN3, RX of

VDDX

PPSM

Disabled

CAN4

PM5

TXCAN2 TXCAN0 TXCAN4

SCK0

PERM/

Port M I/O, TX of CAN2, CAN0,

VDDX

PPSM

Disabled

CAN4, SCK of SPI0

PM4

RXCAN2 RXCAN0 RXCAN4

MOSI0

PERM/

Port M I/O, RX of CAN2, CAN0,

VDDX

PPSM

Disabled

CAN4, MOSI of SPI0

PM3

TXCAN1 TXCAN0

PERM/

Port M I/O, TX of CAN1, CAN0, SS

SS0

VDDX

PPSM

Disabled

of SPI0

PM2

RXCAN1 RXCAN0

PM1

TXCAN0

TXB

MISO0

VDDX

PERM/

PPSM

PERM/

PPSM

Port M I/O, RX of CAN1, CAN0,

Disabled

MISO of SPI0

Disabled Port M I/O, TX of CAN0, TX of BDLC

PM0

RXCAN0

RXB

PERM/

VDDX PPSM Disabled Port M I/O, RX of CAN0, RX of BDLC

PP7

KWP7

PWM7

SCK2

PERP/

Port P I/O, Interrupt, Channel 7 of

VDDX

PPSP

Disabled

PWM, SCK of SPI2

For More Information On This Product,

Go to: www.freescale.com

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