MC9S12DP256B Datasheet, PDF (109/126 Pages) Freescale Semiconductor, Inc – device made up of standard HCS12 blocks and the HCS12 processor core

Freescale Semicon_Md_Cu₉c_S1t₂o_Dr_P,₂I₅n_6Bc_D._{evice User Guide — V02.15}
0
1
2
3
N-1
N
t_min1
t_nom
t_max1
t_minN
t_maxN
Figure A-3 Jitter Definitions
The relative deviation of t_nom is at its maximum for one clock period, and decreases towards zero for larger
number of clock periods (N).
Defining the jitter as:
J(N)
=

max_

1 – ^t-N-m-----_â‹^a---t^x-_n--⁽--_o-N--_m---⁾ ,
1
–
N-t--^m---⋅^--i-nt--_n^-(--_o^-N---_m^-)-



For N < 100, the following equation is a good fit for the maximum jitter:
J(N)
=
---j-¹---
N
+
j₂
J(N)
15
10
20
N
Figure A-4 Maximum bus clock jitter approximation
111
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