MC705P6ACPE Datasheet, PDF (37/98 Pages) Freescale Semiconductor, Inc – M68HC05 Microcontrollers

Chapter 6
Input/Output Ports
6.1 Introduction
In the user mode, 20 bidirectional I/O lines are arranged as two 8-bit I/O ports (ports A and C), one 3-bit
I/O port (port B), and one 1-bit I/O port (port D). These ports are programmable as either inputs or outputs
under software control of the data direction registers (DDRs). Port D also contains one input-only pin.
6.2 Port A
Port A is an 8-bit bidirectional port, which does not share any of its pins with other subsystems (see
Figure 6-1). The port A data register is located at address $0000 and its data direction register (DDR) is
located at address $0004. The contents of the port A data register are indeterminate at initial power up
and must be initialized by user software. Reset does not affect the data registers, but does clear the
DDRs, thereby setting all of the port pins to input mode. Writing a 1 to a DDR bit sets the corresponding
port pin to output mode. Port A has mask option register enabled interrupt capability with an internal pullup
device
NOTE
The keyscan (pullup/interrupt) feature available on port A is NOT available
in the ROM device, MC68HC05P6.
READ $0004
WRITE $0004
WRITE $0000
READ $0000
INTERNAL HC05
DATA BUS
RESET
(RST)
DATA DIRECTION
REGISTER BIT
DATA
REGISTER BIT
V_DD
PULLUP MASK
OPTION REGISTER
I/O
OUTPUT
PIN
Figure 6-1. Port A I/O and Interrupt Circuitry
TO IRQ
INTERRUPT SYSTEM
MC68HC705P6A Advance Information Data Sheet, Rev. 2.1
Freescale Semiconductor
37