MC705P6ACPE Datasheet, PDF (31/98 Pages) Freescale Semiconductor, Inc – M68HC05 Microcontrollers

Chapter 4
Resets
4.1 Introduction
The MCU can be reset from three sources: one external input and two internal reset conditions. The
RESET pin is a Schmitt trigger input as shown in Figure 4-1. The CPU and all peripheral modules will be
reset by the RST signal which is the logical OR of internal reset functions and is clocked by PH1.
RESET
POWER-ON
V_DD
RESET
(POR)
D
RES
DFF
RST TO CPU AND
PERIPHERALS
OSC
DATA
ADDRESS
COP
WATCHDOG
PH1
(COPR)
Figure 4-1. Reset Block Diagram
4.2 External Reset (RESET)
The RESET input is the only external reset and is connected to an internal Schmitt trigger. The external
reset occurs whenever the RESET input is driven below the lower threshold and remains in reset until the
RESET pin rises above the upper threshold. The upper and lower thresholds are given in Chapter 14
Electrical Specifications.
4.3 Internal Resets
The two internally generated resets are the initial power-on reset (POR) function and the computer
operating properly (COP) watchdog timer function.
4.3.1 Power-On Reset (POR)
The internal POR is generated at power-up to allow the clock oscillator to stabilize. The POR is strictly for
power turn-on conditions and should not be used to detect a drop in the power supply voltage. There is a
4064 internal clock cycle oscillator stabilization delay after the oscillator becomes active.
MC68HC705P6A Advance Information Data Sheet, Rev. 2.1
Freescale Semiconductor
31